Packet collecting circuit in data-flow type system

Multiplex communications – Wide area network – Packet switching

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Details

370112, H04J 302

Patent

active

055027202

ABSTRACT:
A plurality of self-synchronous type transfer control circuits and data hold circuits are provided corresponding to a plurality of flow paths. A transfer control circuit for controlling flag transfer and a flag holding circuit for holding a flag are provided. A decoder applies a transfer acknowledging signal for permission of transfer to one of the plurality of transfer control circuits according to a flag held by the flag holding circuit. A data selector outputs data provided from a data holding circuit to a data holding circuit in a succeeding stage according to the flag held by the flag holding circuit.

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patent: 5200647 (1993-04-01), Motoike
"An Implementation Method Of A Large-Scale Storage Mechanism For The Data Driven Processor", Kanekura, 1989, FIGS. 1-3 and 6.

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