Multiplex communications – Wide area network – Packet switching
Patent
1992-05-08
1995-01-24
Hsu, Alpus H.
Multiplex communications
Wide area network
Packet switching
370 61, 370 941, H04J 324, H04L 1254
Patent
active
053847709
ABSTRACT:
Method and apparatus for reducing latency delay associated with converting asynchronous, serial digital data to packet data. The number of data characters received before a time-out occurs are counted; the last character received before a time-out occurs is recognized; or the number of data characters transmitted before a signal is received from the destination terminal are counted. The information thus gathered is used to predict the occurrence of future latency delay. Data packets are transmitted immediately upon the subsequent receipt of a number of data characters equal to the number of data characters received before the time-out occurred; receipt of a character identical to the last character received before a time-out; or receipt of a number of data characters equal to the number of data characters transmitted before another signal is received from the destination terminal, respectively. By transmitting immediately when a latency delay is expected, the latency delay is completely avoided.
REFERENCES:
patent: 4577314 (1986-03-01), Chu et al.
patent: 4680773 (1987-07-01), Amundson
patent: 4774706 (1988-09-01), Adams
patent: 4908821 (1990-03-01), Sirato
patent: 4920534 (1990-04-01), Adelmann et al.
patent: 5056088 (1991-10-01), Price et al.
CCITT Recommendation X.3 (1984) pp. 17-32.
CCITT Recommendation X.25 (1984) pp. 108-242.
CCITT Recommendation V.42bis (1990) pp. 1-27.
Hazzah Karen G.
Mays Richard C.
Sauser, Jr. Martin H.
Hayes Microcomputer Products, Inc.
Hsu Alpus H.
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