Packaging systems and methods

Details Packaging systems and methods Packaging systems and methods

2011-08-23

2011-08-23

Sandvik, Benjamin (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257SE23031

Reexamination Certificate

active

08004072

ABSTRACT:
Packaging systems and methods for semiconductor devices are disclosed. In one embodiment, a packaging system includes a first plate having a first coefficient of thermal expansion (CTE). An integrated circuit is mountable to the first plate. The packaging system includes a second plate coupleable over the first plate over the integrated circuit. The second plate has a second CTE that is substantially a same CTE as the first CTE. A plurality of solder balls is coupleable to the first plate or the second plate and to the integrated circuit.

REFERENCES:
patent: 5868887 (1999-02-01), Sylvester et al.
patent: 6079991 (2000-06-01), Lemke et al.
patent: 7038325 (2006-05-01), Ogino et al.
patent: 2007/0241441 (2007-10-01), Choi et al.
Hsueh, Chun-Hway, “Modeling of elastic deformation of multilayers due to residual stresses and external bending,” Journal of Applied Physics, vol. 91, No. 12 (Jun. 15, 2002).

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