Packaging substrate having heat-dissipating structure

Details Packaging substrate having heat-dissipating structure Packaging substrate having heat-dissipating structure

2008-09-12

2010-02-02

Monbleau, Davienne (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S723000, C257S786000, C257SE25006

Reexamination Certificate

active

07656015

ABSTRACT:
Provided is a packaging substrate with a heat-dissipating structure, including a core layer with a first surface and an opposite second surface having a first metal layer and a second metal layer respectively. Portions of the first metal layer are exposed from a second cavity penetrating the core layer and second metal layer. Portions of the second metal layer are exposed from a first cavity penetrating the core layer and first metal layer. Semiconductor chips each having an active surface with electrode pads thereon and an opposite inactive surface are received in the first and second cavities and attached to the second metal layer and the first metal layer respectively. Conductive vias disposed in build-up circuit structures electrically connect to the electrode pads of the semiconductor chips. A heat-dissipating through hole penetrating the core layer and build-up circuit structures connects the metal layers and contact pads.

REFERENCES:
patent: 2006/0115931 (2006-06-01), Hsu
patent: 2008/0169120 (2008-07-01), Inagaki et al.

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