Packaging substrate

Details Packaging substrate Packaging substrate

1999-01-28

2001-05-29

Gaffin, Jeffrey (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C361S794000, C361S715000, C361S760000, C257S697000, C257S713000

Reexamination Certificate

active

06239981

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a packaging substrate such that electronic components are surface-mounted on the substrate, each electronic component having at side edge portions thereof a plurality of outwardly extending connecting terminals.
When surface mounting electronic components (for example, IC packages with external lead terminals attached thereto), each having at side edge portions thereof a plurality of outwardly extending connecting terminals, on a substrate in adjacent relation to each other, it has hitherto been a typical practice to dispose a plurality of connecting terminals generally uniformly at given intervals at side edge portions of each electronic component, and to arrange them so that the connecting terminals of adjacent electronic components are positioned in opposed relation.
Various proposals intended for packaging density improvement in surface mount of such electronic components on a substrate have been made. In Japanese Patent Laid-Open Publication HEI 2-68983 (hereinafter, referred to as prior art 1), for example, there is disclosed an improvement in the layout of external lead terminals of electronic components.
In this prior art 1, as shown in
FIG. 4
, at side edge portions of the body
71
of each electronic component
70
(IC module), there are provided a pin arrangement portion
71
A at which a plurality of lead terminals
72
are arranged in a side-by-side fashion and a no-pin portion
71
B at which no pin is present. When mounting such electronic components
70
adjacent to each other on a printed board (not shown), the electronic components
70
are usually laid out in such a way that pin arrangement portions
71
A and no-pin portions
71
B, in combination, are so disposed as to define a diagonally crossing configuration so that each pin arrangement portion
71
A of each electronic component
70
and the opposite side no-pin portion
71
B are positioned in opposed relation.
By employing such arrangement, it is possible to reduce the length of the space required in the longitudinal direction of leads for mounting the electronic component
70
as compared with the prior art case in which adjacent electronic components are disposed so that plural leads substantially uniformly arranged at given intervals on side edge portions of the electronic components are positioned in opposed relation. That is, it is possible to increase the packaging density of the electronic components on the substrate.
In the case of a so-called memory IC, for example, one bypass capacitor is required for each IC package. Therefore, when mounting such an IC package on a substrate, it is necessary that a bypass capacitor to be annexed to the IC package is mounted adjacent thereto.
Hitherto, when mounting such an IC package and a bypass capacitor on a substrate, as
FIG. 3
(hereinafter, referred to as prior art 2) illustrates by way of example, it has been a common practice to dispose a plurality of lead terminals
62
generally uniformly at given intervals on side edge portions of the body
61
of each IC package
60
, and to lay out adjacent IC packages
60
, with a bypass capacitor disposed therebetween, so that leads
62
of the adjacent IC packages
60
are positioned in opposed relation.
With such a layout, however, it is necessary to provide a length of the space extending in the longitudinal direction of leads
62
(lateral direction in
FIG. 3
) which corresponds to a cumulative total of the length Lp of IC package
60
including a component mounting land
63
, the length Lc of a bypass capacitor
66
including a land
67
, and a clearance Ls of such an order as not to allow any inter-component electrical short circuit.
Therefore, the longitudinal size of the space required for mounting components in place on substrate
51
, as viewed in the longitudinal direction of leads, (that is, packaging density on the substrate), are determined according to the size of components (such as package length Lp and capacitor length Lc). Therefore, any further improvement in packaging density has not been possible. In the above mentioned case, spaces left open at opposite end sides of bypass capacitor
66
which extend along side edge portions of adjacent package bodies
61
(in a vertical direction as viewed in
FIG. 3
) are useless unoccupied spaces.
It is to be noted that, according to above mentioned prior art 1, the packaging density of electronic component
70
(IC module) only can be improved. However, other kind of electronic component (such as capacitor) cannot be disposed between adjacent electronic components
70
. As such, when mounting an electronic component having a plurality of connecting terminals at side edge portions, and other kind of electronic component to be mounted in combination therewith, as in the case of IC package and a bypass capacitor therefor, the prior art 1 is not effectively applicable.
SUMMARY OF THE INVENTION
This invention has been developed in view of the above mentioned technical problems of the prior art. A primary object of the present invention is, therefore, to provide a packaging substrate such that electronic components having a plurality of connecting terminals at their side edge portions and other kind of electronic component can be mounted in high density on the substrate.
In order to achieve the above object, according to a first aspect of the present invention, there is provided a packaging substrate having electronic components surface mounted on the substrate, each electronic component having at side edge portions thereof a plurality of outwardly extending connecting terminals (hereinafter, referred to as first electronic component when appropriate), wherein the (first) electronic components, each including an open region of a specified length provided at its side edge portion, with no connecting terminal disposed therein, are arranged in such a way that open regions of adjacent electronic components are positioned to confront each other and that front ends of individual connecting terminals are kept in closely spaced relation within a specified spacing range, other kind of electronic component (hereinafter, referred to as second electronic component when appropriate) being surface mounted between the open regions of the adjacent (first) electronic components.
Also, according to a second aspect of the present invention, in a packaging substrate defined as the first aspect of the present invention, the (first) electronic component and other kind of electronic component (second electronic component) are respectively packaged in plurality so that the plurality of the (first) electronic components are arranged in substantially parallel relation along a straight line extending longitudinally of connecting terminals thereof and so that the plurality of other kind of electronic component (second electronic component) are arranged in substantially parallel relation along the longitudinally extending straight line.
Further, according to a third aspect of the present invention, in a packaging substrate defined as the first or second aspect of the present invention, the open region includes a central portion of side edge portion of each (first) electronic component.
Furthermore, according to a fourth aspect of the present invention, in a packaging substrate embodying one of the first to third aspects of the present invention, each of the (first) electronic components is an IC package, the other kind of electronic component (second electronic component) being a capacitor annexed to each IC package.
In the first aspect of the present invention, electronic components (first electronic components) to be mounted on the packaging substrate of the present invention, each having a plurality of connecting terminals on its side edge portions, are provided with at their side edge portions open regions of a given length in which no connecting terminal is mounted. Adjacent first electronic components are arranged in such a way that their respective open regions are positioned in opposed relation and that the front end

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