Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-08-18
2003-07-08
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S017000, C438S108000, C438S118000, C257S685000, C257S687000, C257S783000, C257S778000
Reexamination Certificate
active
06589802
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a packaging structure for bonding electronic parts to a circuit board and a method of packaging electronic parts.
2. Prior Art
Although soldering is often used for assembling a conventional electronic device, in order to satisfy demands of a smaller and thinner electronic device of higher packing density, the terminal pitch is becoming smaller and smaller due to an increase in the number of connection terminals and reduction in size of a package. With the conventional soldering technique, it is getting difficult to supply a solder to a fine electrode with high accuracy and is accordingly getting difficult to assemble an electronic device by soldering.
Bonding techniques for mounting a semiconductor integrated circuit chip onto a circuit board have been developed. Among them, flip-chip bonding for mounting a semiconductor integrated circuit chip with its active device face facing down to a circuit board is an effective method as means for realizing improvement in electric characteristics and packing density.
In the flip chip bonding, however, a semiconductor integrated circuit chip and a circuit board are bonded by using a resin. Consequently, once the semiconductor integrated circuit chip is mounted on the circuit board, it is difficult to detach the semiconductor integrated circuit chip from the circuit board. When a semiconductor integrated circuit chip is defective or a poor connection occurs, electronic devices and electronic parts on the whole circuit board are discarded. The yield is therefore low.
As a method of increasing the yield, a technique of easily detaching and replacing a semiconductor integrated circuit chip is necessary.
One of conventional methods of detaching a semiconductor integrated circuit chip is disclosed in Japanese Unexamined Patent Publication No. H8-186149. According to the method, only projected electrodes on a semiconductor integrated circuit chip and electrodes on a circuit board are bonded to each other. The semiconductor integrated circuit chip is subjected to an operation check. When it fails, the projected electrodes are irradiated with a laser beam from a side of the semiconductor integrated circuit chip so as to be cut, thereby detaching the semiconductor integrated circuit chip.
In the method of cutting the projected electrodes by irradiating the projected electrodes on the semiconductor integrated circuit chip with a laser beam, a laser beam is emitted in the horizontal direction with respect to the circuit board. In a state where parts are mounted around the semiconductor integrated circuit chip, it is therefore difficult to emit a laser beam toward the projected electrodes on the semiconductor integrated circuit chip. Generally, at the time of an operation check of a semiconductor integrated circuit chip or an electronic device, the semiconductor integrated circuit chip is not evaluated alone but is evaluated in a state where not only the semiconductor integrated circuit chip but also a bypass capacitor, a resistor and the like are mounted. Electronic parts are thus mounted around the semiconductor integrated chip.
Since the height of each projected electrode on the semiconductor integrated circuit chip is as low as tens to hundreds microns, the laser beam has to be irradiated with high accuracy, so that the work is difficult. There is consequently a problem such that a work cost of detaching the semiconductor integrated circuit chip is high.
SUMMARY OF THE INVENTION
In order to solve the problems of the conventional technique, it is an object of the present invention to provide a structure in which a semiconductor integrated circuit chip is easily detached and reliability of flip-chip bonding is assured, and to provide a method of mounting electronic devices.
According to the invention, in order to achieve the object, a flip-chip bonding structure using two kinds of resins of soluble and insoluble resins which are used to bond a semiconductor integrated circuit chip and a circuit board. The semiconductor integrated circuit chip is detached by dissolving the soluble resin with a solvent.
More specifically, the invention is defined in the claims.
A “soluble” resin has a two-dimensional molecular structure and an “insoluble” resin has a three-dimensional molecular structure. When an energy such as thermal energy or light energy is applied from the outside to a resin of the two-dimensional molecular structure, the resin is mixed with the substance of a solvent and is dispersed in a molecular state (dissolved). Consequently, the adhesion of the resin is weakened. Since the intermolecular force of the three-dimensional molecular structure is strong, the molecules are not easily dispersed (not dissolved).
As an example, packaging or repair as described hereinbelow is performed.
First, a soluble resin is applied in advance in the central part of a position in which a semiconductor integrated circuit chip will be mounted on a circuit board. After the projected electrodes on the semiconductor integrated circuit chip and electrodes on the substrate are positioned, the semiconductor integrated circuit chip is mounted on the circuit board, the semiconductor integrated circuit chip and the circuit board are heated by a bonding tool which attracts the semiconductor integrated circuit chip and a substrate stage on which the circuit board is placed, to thereby set the soluble resin.
Then parts to be soldered other than the semiconductor integrated circuit chip are mounted.
An operation check of the semiconductor integrated circuit chip and each of the parts mounted on the circuit board is performed.
When the semiconductor integrated circuit chip or a part mounted on the circuit board is faulty as a result of the test, the semiconductor integrated circuit chip is covered with cloth, and a solvent is applied on the cloth so as to permeate through and dissolve the soluble resin interposed between the semiconductor integrated circuit chip and the circuit board.
The “dissolution” denotes here a phenomenon that a substance which is inherently in a solid state is mixed with a substance in a liquid state and is dispersed in a molecule state or substances in a liquid state are mixed with each other. A phenomenon such that the adhesion is weakened by using a solvent is sufficient.
The bonding tool to which an adhesive is adhered is pressed against the semiconductor integrated circuit chip so that the adhesive is adhered to the semiconductor integrated circuit chip. When the bonding tool is lifted up, the semiconductor integrated circuit chip is detached from the circuit board.
Subsequently, the soluble resin is applied, a new semiconductor integrated circuit chip is mounted on the circuit board, and an operation check is made.
On the other hand, when the semiconductor integrated circuit chip or a part mounted on the circuit board passes the test, an insoluble resin is applied around the semiconductor integrated circuit chip and is set, thereby forming a fillet around the semiconductor integrated circuit chip. By applying the insoluble resin around the semiconductor integrated circuit chip, the resistance to the solvent can be improved.
With the construction, therefore, by using both the soluble resin and the insoluble resin, the very reliable packaging structure which is easily repaired can be provided.
REFERENCES:
patent: 4784872 (1988-11-01), Moeller et al.
patent: 5498575 (1996-03-01), Onishi et al.
patent: 5930597 (1999-07-01), Call et al.
patent: 6245582 (2001-06-01), Yamaguchi et al.
patent: 6274389 (2001-08-01), Iida et al.
patent: 6306688 (2001-10-01), Lunceford
patent: 09-221650 (1997-08-01), None
Asada Toyoki
Fujita Yuji
Kanda Naoya
Matsuyoshi Mari
Ueda Kie
Hitachi , Ltd.
Picardat Kevin M.
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