Packaging semiconductors at wafer level

Details Packaging semiconductors at wafer level Packaging semiconductors at wafer level

2008-07-18

2011-10-11

Chambliss, Alonzo (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257SE21505, C257SE23005, C438S107000

Reexamination Certificate

active

08035219

ABSTRACT:
A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming, in a first lithographically processable material disposed on the surface portion of the semiconductor wafer, device exposing openings to expose the devices and electrical contact pad openings to expose electrical contact pads for devices; and mounting a support having a rigid dielectric layer formed on a selected portion of the support, such rigid dielectric layer comprising a second lithographically processable material, such rigid material being suspended over the device exposing openings and removed from portions of the support disposed over the electrical contacts pads openings in the first lithographically processable material. The support is released and removed from the second lithographically processable material, leaving the second photolithographically processable material bonded to the first photolithographically processable material.

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