Packaging microminiature devices

Details Packaging microminiature devices Packaging microminiature devices

1984-02-17

1986-09-23

Edlow, Martin H.

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific current responsive fault sensor

357 40, 357 49, 357 55, 357 69, 357 70, 357 71, 357 80, 361404, 174 52FP, H01L 2348, H01L 2944, H01L 2952

Patent

active

046138919

ABSTRACT:
One or more silicon-integrated-circuit chips are attached, active side up, to the bottom side of a silicon wafer. A sloped-wall through-aperture is etched in the wafer in registry with a portion of the active side of each attached chip. A lithographically defined conductive pattern is then formed on the top side of the wafer and on the sloped walls to connect conductive pads on each chip to conductive pads on other chips and/or to conductive terminals disposed along the periphery of the wafer. The resulting packaged chip assembly has advantageous performance and cost characteristics.

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Bodendorf et al., "Active Silicon Chip Carrier," IBM Tech. Discl. Bull., vol. 15, No. 2, Jul. 1972, pp. 656 and 657.
Magdo, "Pyramid Shaped Elec. Feedthrough in Si Wafers," IBM Tech. Discl. Bull., vol. 19, No. 4, Sep. 1976, pp. 1232-1233.
"Wafer-Chip Assembly for Large-Scale Integration," IEEE Transactions on Electron Devices, vol. ED-15, No. 9, P. Kraynak et al, Sep. 1968, pp. 660-663.

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