Packaging method, packaging structure and package substrate...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

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C257S778000, C257SE23180

Reexamination Certificate

active

10803879

ABSTRACT:
A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate1of the invention is such that an opening11is formed in a first substrate12, a thin film substrate (a second substrate)13is laminated on the first substrate12, the opening11is covered with the thin film substrate13. Next, a capacitor (a first electronic part)14is inserted into the opening11and bonded to the thin film substrate, a resin15fills an interior of the opening11to a fixed or larger thickness and is hardened, the thin film substrate13and the capacitor14are thereby sustained by the resin15, an LSI16(a second electronic part) that should be connected to the capacitor14is bonded to a surface, on an exposed side, of the thin film substrate13, and the capacitor14is connected to the LSI16.

REFERENCES:
patent: 5990550 (1999-11-01), Umezawa
patent: 6072122 (2000-06-01), Hosoya
patent: 6518666 (2003-02-01), Ikeda
patent: 2002/0149098 (2002-10-01), Seyama et al.
patent: 2003/0047800 (2003-03-01), Sasakura et al.
patent: 2005/0202595 (2005-09-01), Yonehara et al.
patent: 08-274214 (1996-10-01), None
patent: 2002-314031 (2002-10-01), None
U.S. Appl. No. 11/265,107, filed Nov. 3, 2005, Masateru Koide, Fujitsu Limited.
Notice of Allowance issued Apr. 6, 2007 in corresponding U.S. Appl. No. 11/265,107 (6 pp.).

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