Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2007-09-11
2007-09-11
Weiss, Howard (Department: 2814)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S106000, C438S508000
Reexamination Certificate
active
11265107
ABSTRACT:
A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate1of the invention is such that an opening11is formed in a first substrate12, a thin film substrate (a second substrate)13is laminated on the first substrate12, the opening11is covered with the thin film substrate13. Next, a capacitor (a first electronic part)14is inserted into the opening11and bonded to the thin film substrate, a resin15fills an interior of the opening11to a fixed or larger thickness and is hardened, the thin film substrate13and the capacitor14are thereby sustained by the resin15, an LSI16(a second electronic part) that should be connected to the capacitor14is bonded to a surface, on an exposed side, of the thin film substrate13, and the capacitor14is connected to the LSI16.
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Office Action mailed from the USPTO on Feb. 21, 2006 in U.S. Appl. No. 10/803,879.
Notice of Allowance issued Apr. 6, 2007 in corresponding U.S. Patent Application No. 10/803,879 (9 pp).
Fukuzono Kenji
Kanda Takashi
Koide Masateru
Umematsu Misao
Usui Yasuhiro
Fujitsu Limited
Staas & Halsey , LLP
Trinh (Vikki) Hoa B.
Weiss Howard
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