Packaging and interconnect system for integrated circuits

Details Packaging and interconnect system for integrated circuits Packaging and interconnect system for integrated circuits

1995-04-10

1999-12-07

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Smart card package

257723, 257787, 257685, H01L 2302

Patent

active

059988592

ABSTRACT:
A thin MCM packaging structure and technique is provided in which a thin film decal interconnect circuit is fabricated on a thin aluminum wafer. The thin-film decal interconnect employs Au metallurgy for bonding and comprises a bond pad/ground plane layer, topside pads, and one or more routing layers. The top routing layer also acts as the pad layer along the edge of the interconnect structure. The underside of the decal interconnect structure is provided with metal pads for attachment to conventional aluminum or gold I/O pads on one surface of the integrated circuit die. A thermosonic bonding system is used to bond the die pads to the pads. The aluminum wafer is selectively removed forming one or more cavities to hold one or more die to be mounted on the MCM structure. The die are oriented with their pads in contact with contact pads on the thin-film decal interconnect to which they are bonded and the cavities are filled with a liquid encapsulant and cured. The composite structure may be lapped down to minimize overall package thickness and to expose the backsides of the integrated circuit die for thermal management.

REFERENCES:
patent: 3781596 (1973-12-01), Galli et al.
patent: 4549200 (1985-10-01), Ecker et al.
patent: 4931853 (1990-06-01), Ohuchi et al.
patent: 5048179 (1991-09-01), Shindo et al.
patent: 5123850 (1992-06-01), Elder et al.
patent: 5138433 (1992-08-01), Hiruta
patent: 5196992 (1993-03-01), Sawaya
patent: 5239198 (1993-08-01), Lin et al.

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