Packaged RF power transistor having RF bypassing/output...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C438S106000, C361S777000

Reexamination Certificate

active

06822321

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to RF power transistors, and more particularly the invention relates to combining output matching and RF and video bypass circuitry in a packaged RF power transistor.
RF power transistors providing 10 watts or more of power are typically packaged as a discrete device, as shown generally at
10
in FIG.
1
A and schematically in FIG.
1
B. The packaged transistor (FET or bipolar) normally includes an input matching circuit
12
connecting input lead
14
to a gate of a FET (or base of a bipolar transistor) and an output matching circuit
16
connecting output lead
18
to the drain of a FET (or collector or emitter of a bipolar transistor). Normally the source of the FET is grounded.
The packaged transistor is typically mounted on a printed circuit board
20
as shown in FIG.
2
. Also mounted on the printed circuit board are matching circuits
22
,
24
and a bias/RF diplexer
26
which connect the transistor output to an RF output. A DC power supply is connected to the transistor output lead through a bias line RF and video bypass circuit
28
, diplexer
26
, and matching circuit
22
. This dual function of the printed circuit board circuitry presents a desired impedance transformation at the carrier frequency, and provides a means of injection of DC bias current to the device through the diplexer. The circuitry must also properly bypass the power supply connection at RF and video frequencies. The distance of the circuitry from the packaged transistor is a limitation in this conventional approach. This separation introduces significant electrical delay, and the inherent characteristics of capacitors used in printed circuit board circuits causes an unavoidable limitation in bias circuit video bandwidth.
BRIEF SUMMARY OF THE INVENTION
In accordance with the invention, the output matching circuit and diplexer along with the RF and video bypassing network are integrated with the power transistor within the transistor package. This places the circuitry closer to the transistor and increases the power supply bypassing video bandwith. Further, the linearity (fidelity) of the power transistor circuit is improved relative to conventional devices for wideband signals.
In implementing the invention, discrete multilayer capacitors of the RF and video bypassing network can be connected in parallel with a capacitor (with optimal properties at the carrier frequency) of the output matching circuit in an integral arrangement with wire bonding providing inductive elements of the circuitry. Typically a wirebond is set to provide a shunt inductive reactance that is equal and opposite to the reactance of the transistor parasitic output capacitance. Additional capacitance for the RF output can be provided also with the RF output providing a bias input or functioning with a separate bias input.
The invention and objects and features thereof will be more readily apparent from the following detailed description and dependent claims when taken with the drawings.


REFERENCES:
patent: 5272450 (1993-12-01), Wisherd
patent: 5309014 (1994-05-01), Wilson
patent: 5752182 (1998-05-01), Nakatsuka et al.

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