Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2008-02-19
2009-08-11
Tran, Thien F (Department: 2895)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S126000, C438S127000
Reexamination Certificate
active
07572680
ABSTRACT:
A semiconductor package (10) uses a plurality of thermal conductors (56-64) that extend upward within an encapsulant (16) from one or more thermal bond pads (22, 24, 26) on a die (14) to disperse heat. The thermal conductors may be bond wires or conductive stud bumps and do not extend beyond a lateral edge of the die. One or more of the thermal conductors may be looped within the encapsulant and exposed at an upper surface of the encapsulant. In one form a heat spreader (68) is placed overlying the encapsulant for further heat removal. In another form the heat spreader functions as a power or ground terminal directly to points interior to the die via the thermal conductors. Active bond pads may be placed exclusively along the die's periphery or also included within the interior of the die.
REFERENCES:
patent: 6597065 (2003-07-01), Efland
patent: 6707140 (2004-03-01), Nguyen et al.
patent: 2005010989 (2005-02-01), None
Hess Kevin J.
Lee Chu-Chung
Clingan, Jr. James L.
Freescale Semiconductor Inc.
King Robert L.
Tran Thien F
LandOfFree
Packaged integrated circuit with enhanced thermal dissipation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Packaged integrated circuit with enhanced thermal dissipation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Packaged integrated circuit with enhanced thermal dissipation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4093359