Package with solder-filled via holes in molding layers

Details Package with solder-filled via holes in molding layers Package with solder-filled via holes in molding layers

2007-07-23

2010-02-23

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

C257S686000

Reexamination Certificate

active

07667338

ABSTRACT:
The present invention discloses an electronic package to contain and protect an integrated circuit (IC) chip. The electronic package further includes a leadframe, a flexible circuit or PCB type of substrate. The leadframe, flexible circuit or PCB type substrate further includes solder contacts, which are aligned with via holes in the molding layers on the top and bottom sides of the package. These via holes are for placing solder paste or solder balls from above and below for electrical access to the IC chip. These solder balls provide access for electrical testing after the package is mounted on a motherboard. They also provide the connection points for stacking multiple packages vertically.

REFERENCES:
patent: 5608265 (1997-03-01), Kitano et al.
patent: 5973393 (1999-10-01), Chia et al.
patent: 6309916 (2001-10-01), Crowley et al.
patent: 6580167 (2003-06-01), Glenn et al.
patent: 6614104 (2003-09-01), Farnworth et al.

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