Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-08-28
2004-06-01
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C438S106000, C438S113000, C438S127000, C438S612000, C365S129000
Reexamination Certificate
active
06744114
ABSTRACT:
FIELD OF THE INVENTION
The invention is related to the field of wafer attachment. In particular, the present invention is related attaching two wafers together with electronic devices on both wafers.
BACKGROUND
Many analog circuits required inductors and capacitors for tuning or impedance matching. It is known that inductors and capacitors can consume a large area of an integrated circuit, which may increase the cost of integrated circuitry. It is also known that, while inductors and capacitors may be fabricated on a variety of substrates, conducting substrates such as silicon can introduce parasitics that may impair some device characteristics, for example, the quality factor Q.
Many microtechnologies and integrated circuit technologies are packaged in ways to protect components from environmental effects. For example, micro-electro-mechanical systems (MEMS) may include resonating cantilever beams, which can be detrimentally affected by high humidity environments, and so MEMS technologies are often hermetically sealed or even vacuum packaged. Much effort often goes into providing adequate packaging safeguards to prevent corrosion or interference caused by environmental conditions.
SUMMARY OF THE INVENTION
The present invention addresses several aspects of the problems of packaging and provision of devices such as inductors and large capacitors that have proved difficult to include in some integrated circuits. In several embodiments, a device such as an inductor or a capacitor may be provided on a first wafer that includes pillars formed by etching or other subtractive processes. In such embodiments, the first wafer may be attached to a second wafer having other circuit components in such a way as to provide connections between the device on the first wafer and the circuit components on the second wafer. The attachment of the first wafer to the second wafer may also package the circuit, for example, using solder bonds, to provide a hermetic or vacuum seal for the packaged circuit.
In one embodiment, a first wafer is provided of a material, such as glass, that is not electrically conductive, so that high Q inductors, capacitors or other devices may be constructed, and the first wafer includes conductive elements that can be used to connect to a circuit on a second wafer. In another embodiment, two wafers may be attached to one another in such a way as to allow stacking of components on different layers of wafers. In yet another embodiment, a device may be provided on a first wafer and the first wafer may be adapted to allow electrical connection between the device and a circuit on a second wafer so that the device may be thermally, electrically, or magnetically isolated from the rest of the circuit. In at least one embodiment, a device is provided on a first wafer and connected to a circuit on a second wafer such that fields produced in the device and the circuit can be isolated from one another.
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Wong, C.P., et al., “Flip the Chip”, Science's Compass, vol. 290, pp. 2269-2270, Dec. 22, 2000.
“Nature's way of plating”, The Economist, p. 8, Jun. 22-28, 2002.
“Making the connection”, The Economist, pp. 8 & 10, Jun. 22-28, 2002.
Dentry James F.
Peczalski Andrezej
Luxton Matthew
Nelms David
Tran Mai-Huong
Tufte Brian N.
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