Package substrate for improving electrical performance

Details Package substrate for improving electrical performance Package substrate for improving electrical performance

2005-12-27

2005-12-27

Loke, Steven (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S700000, C257S774000, C257S784000, C257S692000, C257S786000

Reexamination Certificate

active

06979897

ABSTRACT:
A package substrate for improving electrical performance includes at least an insulating layer, a wiring layer and a ground/power layer. The wiring layer is formed on a top surface of the insulating layer, and includes a plurality of inner fingers, a plurality of outer fingers and a metal ring. A plurality of inner through holes are formed through the insulating layer to electrically connect corresponding inner fingers to bottom surface of the insulating layer. The ground/power layer has a plurality of openings formed on a bottom surface of the insulating layer. The plurality of inner through holes are crowded in groups to pass through the openings which are electrically isolated from the ground/power layer. Each group of the inner through holes are arranged in grid array or radial arrangement so that a distance between two adjacent openings not less than 0.2 mm for improving electrical performance of the ground/power layer.

REFERENCES:
patent: 6064113 (2000-05-01), Kirkman
patent: 6440770 (2002-08-01), Banerjee et al.
patent: 6630743 (2003-10-01), Magnuson et al.
patent: 490818 (2002-06-01), None
patent: 434664 (2003-07-01), None

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