Package substrate for electrolytic leadless plating and...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S110000, C438S121000, C438S125000, C438S612000, C438S678000

Reexamination Certificate

active

06872590

ABSTRACT:
Disclosed is a package substrate for electrolytic leadless plating, characterized in that a wire bonding pad onto which a semiconductor chip is mounted is subjected to electrolytic leadless Au plating, and a solder ball pad is subjected to OSP metal finishing or electroless Au plating without use of plating lead lines, upon preparation thereof. A method of manufacturing the package substrate is also disclosed. The method includes Cu plating a whole surface of a base substrate having through-holes, developing a first dry film laminated onto the through-holes, removing a copper foil not covered with the first dry film, stripping the first dry film, exposing and developing a second dry film on the substrate so that only an upper portion to be subjected to electrolytic Au plating is exposed, grounding an electrolytic Au plating terminal to a solder ball pad, Ni—Au plating the wire bonding pad, removing the second dry film by a stripping solution, exposing and developing a third dry film, removing the exposed copper foil by an etching solution, removing the third dry film by a stripping solution, performing a series of processes of coating, exposing, developing and drying a solder resist, and subjecting the solder ball pad to OSP metal finishing.

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patent: 6781224 (2004-08-01), Yoneda et al.
patent: 6797890 (2004-09-01), Okubora et al.

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