Package substrate embedded with semiconductor component

Details Package substrate embedded with semiconductor component Package substrate embedded with semiconductor component

2008-12-19

2011-11-15

Dickey, Thomas L (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Housing or package filled with solid or liquid electrically...

C257SE23010

Reexamination Certificate

active

08058718

ABSTRACT:
A package substrate embedded with a semiconductor component includes a substrate, a semiconductor chip, a first dielectric layer, a first circuit layer and first conductive vias. The substrate is formed with an opening for allowing the semiconductor chip to be secured therein. The semiconductor chip has an active surface and an inactive surface, wherein a plurality of electrode pads are formed on the active surface thereof and a passivation layer disposed thereon. The first dielectric layer is disposed both on the substrate and the passivation layer, wherein vias are formed at locations corresponding to those of the electrode pads and penetrating the dielectric layer and the passivation layer to expose the electrode pads therefrom. The first circuit layer is disposed on the first dielectric layer and electrically connected to the first conductive vias. The first conductive vias are disposed in the openings of the dielectric and passivation layers and the first circuit layer is electrically connected to the electrode pads, thereby allowing the first conductive vias to be electrically connected to the electrode pads of the chip.

REFERENCES:
patent: 6586276 (2003-07-01), Towle et al.
patent: 2004/0004284 (2004-01-01), Lee et al.
patent: 2006/0087037 (2006-04-01), Hsu
patent: 2006/0090335 (2006-05-01), Hsu et al.

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