Package substrate

Details Package substrate Package substrate

2000-05-31

2002-05-21

Gandhi, Jayprakash N. (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C361S793000, C361S792000, C174S250000, C174S255000, C257S700000, C257S701000

Reexamination Certificate

active

06392898

ABSTRACT:

BACKGROUND ART
The present invention relates to a package board on which an IC chip is to be mounted, more particularly, a package board provided with soldering pads on its top and bottom surfaces. The soldering pads are connected to the IC chip, as well as to boards such as a mother board, a sub-board, etc.
A highly integrated IC chip is mounted on the package board and connected to a mother board, a sub-board, etc. Hereunder, a configuration of this package board will be described with reference to
FIG. 23
, which is a. cross sectional view of the package board
600
provided with an IC chip
80
and mounted on a mother board
90
. The package board
600
includes conductor circuits
658
A and
658
B formed on both surfaces of its core board
630
. Furthermore, conductor circuits
658
C and
658
D are formed in the upper layer of the conductor circuits
658
A and
658
B with an interlaminar resin insulating layer
650
therebetween respectively. On the upper layer of the conductor circuits
658
C and
658
D is formed an interlaminar resin insulator
750
. In the interlaminar resin insulating layer
650
are formed via-holes
660
A and
660
B and in the interlaminar resin insulator
750
are formed via-holes
660
D and
660
C respectively. On the other hand, on the top surface of the package board on which the IC chip
80
is mounted are formed soldering bumps
676
U connected to the pads
82
formed on the IC chip
80
side surface of the package board. On the bottom surface of the package board
600
on which a sub-board
90
is mounted are formed soldering bumps
676
D connected to the pads
92
formed on the mother board
90
side surface of the package board
600
. Each of the soldering bumps
676
U is formed on a soldering pad
675
U. Each of the soldering bumps
676
D is formed on a soldering pad
675
D. In order to more improve the connection reliability of the soldering bumps
676
U and
676
D, resin
84
is sealed in a clearance between the IC chip
80
and the package board
600
. In the same way, resin
94
is sealed in a clearance between the package board
600
and the mother board
90
.
As described above, the package board
600
is used to connect the highly integrated IC chip
80
to the mother board
90
. The pads
82
formed on the IC chip
80
side surface are as small as 133 to 170 &mgr;m in diameter and the pads
92
formed on the mother board
90
side surface are as large as 600 &mgr;m in diameter. Consequently, the IC chip
80
cannot be attached directly to the mother board
90
. This is why the package board
600
is disposed between the IC chip
80
and the mother board
90
.
The package board
600
is formed so as to match both IC chip side soldering pads
675
U and mother board side soldering pads
675
D with both IC chip side pads
82
and mother board side pads
92
in size respectively. Consequently, the rate of the area occupied by the soldering pads
675
U on the IC chip side surface of the package board
600
differs from the rate of the area occupied by the soldering pads
675
D on the mother board side surface of the package board
600
. And, both interlaminar resin insulator
650
and core board
630
are made of resin and the soldering pads
675
U and
675
D are made of a metallic material such as nickel. Consequently, when the resin portions of the interlaminar resin insulating layers
650
and
750
are shrunk due to curing, drying, etc. in the manufacturing process, the package board is warped toward the IC chip side sometimes. This is because of a difference in the rate of the area occupied by the soldering pads between
675
U on the IC chip side surface and
675
D on the mother board side surface of the package board
600
as described above. In addition, when in an actual usage of the package board
600
on which an IC chip is mounted, the heat generated from the IC chip makes the package board expand and shrink repetitively, causing a difference of shrinkage factor between the resin portion and the metallic portion of those soldering pads. And, this results in warping of the package board
600
sometimes.
In the case of a multi-layer board used as such a package board, one of a plurality of conductor circuit layers is generally used as a ground layer or a power supply layer to reduce noise or for other purposes. In the case of a multi-layer wiring board manufactured by a conventional technology as shown in
FIG. 23
, however, the ground layer (or the power supply layer) is connected to an external terminal via a wire. In other words, wires
658
A and
658
B (conductor circuits) used as ground layers are formed on the upper layer of the board
630
. The wiring (ground layer)
658
B is connected to the wiring
658
D-S through a via-hole
660
B and the wiring
658
D-S is connected to the soldering bump
676
U through a via-hole
660
D.
Since the ground layer
658
D is connected to the soldering bump
676
U via the wiring
658
D-S in this case, the wiring
658
D-S is apt to generate noise and the noise causes malfunctions in electric elements such as an IC chip connected to the multi-layer wiring board. In addition, such the multi-layer wiring board needs a space for wiring in itself and this makes it difficult to realize higher integrated printed wiring boards.
On the other hand, a package board generally includes capacitors therein used to reduce noise from signals transmitted between the IC chip and the mother board. In an embodiment as shown in
FIG. 23
, inner layer conductor circuits
658
A and
658
B provided on both surfaces of the core board
630
are used as a power supply layer and a ground layer, so that capacitors are formed between the core board
630
and the power supply layer and the ground layer respectively.
FIG. 24A
is a top view of the inner conductor circuit layer
658
B formed on the top surface of the core board
630
. On the inner conductor circuit layer
658
B are formed a ground layer
638
G, as well as land-pads
640
for connecting the top layer to the bottom layer. And, around each of the land-pads
640
is formed an insulating buffer
642
.
Each of the land-pads
640
consists of a land
640
a
of a through-hole
636
of the core board
630
shown in
FIG. 23
, a pad
640
b
connected to a via-hole
660
A going through the upper interlaminar resin insulating layer
650
, and a wire
640
c
connecting the land
640
a
to the pad
640
b.
In the case of a package board manufactured by the conventional technology, the land
640
a
is connected to the pad
640
b
via the wiring
640
c.
Consequently, the transmission path provided between the upper conductor layer and the lower conductor layer is longer, so that the package board has confronted with problems that the signal transmission slows down and the connecting resistance increases.
Furthermore, as shown in
FIG. 24A
, a corner K is formed at a joint between the wiring
640
c
and the land
640
a,
as well as at a joint between the wiring
640
c
and the pad
640
b
respectively. And, stress is concentrated on each of those corners K due to a difference of thermal expansivity between the core board
630
/interlaminar resin insulating layer
650
made of resin and the land pad
640
made of a metallic material (copper, etc.). This causes a crack L
1
to be generated sometimes in the interlaminar resin insulating layer
650
as shown in
FIG. 23
, resulting in breaking of a wire in the conductor circuit
658
D or the via-hole
660
D formed in the interlaminar resin insulating layer
650
.
On the other hand, the mother board
90
side soldering bumps
676
D are connected to the inner conductor circuit layer
658
C through the via-holes
660
D, the wiring
678
, and the soldering pads
675
.
FIG. 24B
shows an expanded view (C direction) of both via-hole
660
D and soldering bump
675
D shown in
FIG. 23. A
soldering bump
675
on which a soldering bump
676
D is mounted is formed circularly and connected to a circularly-formed via-hole
660
D through the wiring
678
.
The IC chip
80
repeats the heat cycle between high temperature during an operatio

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