Package structure of semiconductor and wafer-level formation...

Details Package structure of semiconductor and wafer-level formation... Package structure of semiconductor and wafer-level formation...

2007-07-03

2007-07-03

Doan, Theresa (Department: 2814)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C438S108000, C438S109000

Reexamination Certificate

active

11164818

ABSTRACT:
In wafer-level formation of a package structure of semiconductor, multitudes of conductive connection structures are formed protruded from a transparent substrate. Multitudes of grooves are formed in a semiconductor wafer and an adhesive is filled therein. The wafer and the transparent substrate are jointed in which each of the conductive connection structures are positioned in one of the grooves and exposed outside of another surface of the semiconductor wafer. A package structure is obtained by sawing the wafer and has electrical connection between the signals of the active side and back side through the conductive connection structures.

REFERENCES:
patent: 5611140 (1997-03-01), Kulesza et al.
patent: 5966593 (1999-10-01), Budnaitis et al.
patent: 6022761 (2000-02-01), Grupen-Shemansky et al.
patent: 2003/0087475 (2003-05-01), Sterrett et al.

Affiliated with

Also associated with

Rating

Package structure of semiconductor and wafer-level formation... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Package structure of semiconductor and wafer-level formation..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Package structure of semiconductor and wafer-level formation... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3818112