Package structure of photoelectronic device and fabricating...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S098000, C257SE21499, C257SE21058, C438S106000, C438S025000, C438S027000, C438S028000, C438S043000

Reexamination Certificate

active

07994628

ABSTRACT:
A package structure for photoelectronic devices comprises a silicon substrate, a first insulating layer, a reflective layer, a second insulating layer, a first conductive layer, a second conductive layer and a die. The silicon substrate has a first surface and a second surface, wherein the first surface is opposed to the second surface. The first surface has a reflective opening, and the second surface has at least two electrode via holes connected to the reflective opening and a recess disposed outside the electrode via holes. The first insulating layer overlays the first surface, the second surface and the recesses. The reflective layer is disposed on the reflective opening. The second insulating layer is disposed on the reflective layer. The first conductive layer is disposed on the surface of the second insulating layer. The second conductive layer is disposed on the surface of the second surface and inside the electrode via holes. The die is fixed inside the reflective opening and electrically connected to the first conductive layer.

REFERENCES:
patent: 6268660 (2001-07-01), Dhong et al.
patent: 6531328 (2003-03-01), Chen
patent: 6562643 (2003-05-01), Chen et al.
patent: 2004/0211970 (2004-10-01), Hayashimoto et al.
patent: 2004/0218390 (2004-11-01), Holman et al.
patent: 2006/0208271 (2006-09-01), Kim et al.
patent: 2007/0018190 (2007-01-01), Kim et al.
patent: 1 835 550 (2007-09-01), None
patent: 2006135276 (2006-05-01), None
patent: 200834970 (2008-08-01), None
Search Report issued on May 26, 2010 for 08167507.6-2222, which is a corresponding European patent application, that cites US2007/018190 A1, EP1835550 A2, and JP2006135276 A.

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