Package structure and package substrate thereof

Details Package structure and package substrate thereof Package structure and package substrate thereof

2007-10-10

2011-11-15

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

C257S667000, C257SE23020, C257SE23060, C438S106000

Reexamination Certificate

active

08058725

ABSTRACT:
A package structure and a package substrate thereof are provided. The package structure includes a package substrate, a chip and a molding compound. The package substrate has an upper surface and a lower surface. The lower surface has a molding area and a pad area. The molding area has at least one window opening penetrating the upper surface and the lower surface. The pad area is used for disposing at least one solder ball or at least one connecting pin. The package substrate includes a solder mask. The solder mask covers the lower surface of the package substrate. The solder mask has at least one groove. The groove is disposed between the molding area and the pad area. The chip disposed on the package substrate has an active surface. The active surface contacts with the upper surface of the package substrate. The molding area is covered by the molding compound.

REFERENCES:
patent: 5786239 (1998-07-01), Ohsawa et al.
patent: 6013946 (2000-01-01), Lee et al.
patent: 6144102 (2000-11-01), Amagai
patent: 6489667 (2002-12-01), Shim et al.
patent: 6772512 (2004-08-01), Tsai et al.
patent: 6818989 (2004-11-01), Higuchi et al.
patent: 2002/0095192 (2002-07-01), Pu et al.
patent: 2002/0119595 (2002-08-01), Kim et al.

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