Package stack via bottom leaded plastic (BLP) packaging

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Patent

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Details

257686, 257693, H01L 2302

Patent

active

059862092

ABSTRACT:
A packaged semiconductor device has bottom surface leads having portions of the package adjacent the lead edges excised. The outer leads may take the form of inverted-J leads, short stub leads, vertically bent leads-in-grooves, or may be entirely eliminated. Lead connections are on the bottom package surface, over the top package surface, and/or on the sides and ends of the package, enabling vertical stacking of the devices and simultaneous/alternative coplanar horizontal connections to other semiconductor devices, circuit boards, etc. A mold assembly with a castellated inner surface forms a package with alternating grooves and columns for holding side and end electrical connection surfaces.

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Samsung DRAM Web Page, High Density DRAMs, 2 pages.

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