Package-on-package device, semiconductor package and method...

Details Package-on-package device, semiconductor package and method... Package-on-package device, semiconductor package and method...

2009-09-23

2010-11-23

Garber, Charles D (Department: 2812)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S067000, C438S108000, C438S118000, C438S127000, C257SE21499, C257SE21503, C257SE21705

Reexamination Certificate

active

07838334

ABSTRACT:
A semiconductor package includes a substrate, a chip, an interposer and a molding compound. The chip is electrically connected to the upper surface of the substrate. The interposer is disposed on the chip, and electrically connected to the upper surface of the substrate. The interposer includes an embedded component and a plurality of electric contacts, wherein the embedded component is located between the upper and lower surfaces of the interposer, and the electric contacts are located on the upper surface of the interposer. The molding compound seals the chip and covers the upper surface of the substrate and the lower surface of the interposer.

REFERENCES:
patent: 2003/0205826 (2003-11-01), Lin et al.
patent: 2006/0244157 (2006-11-01), Carson
patent: 2009/0236718 (2009-09-01), Yang et al.
patent: 2009/0236735 (2009-09-01), Corisis et al.
patent: 2010/0038772 (2010-02-01), Taguchi et al.

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