Package having a structure for stabilizing and/or impedance-matc

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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257692, H01L 2302

Patent

active

052257096

ABSTRACT:
A packaged semiconductor device has a package, a semiconductor IC chip disposed in a space formed in the package, a strip conductor buried at a first level in the package for carrying a signal to be coupled to the IC chip, a first reference potential conductor buried at a second level in the package for providing a reference potential for the IC chip and a second reference potential conductor buried at the first level in the package for shielding the strip conductor. A connection conductor such as a bonding wire is provided across the second reference potential conductor for connecting the IC chip with one of the ends of the strip conductor. A dielectric material is provided between the connection conductor and the second reference potential conductor to provide the connection conductor with a characteristic impedance matched with an impedance of a source of the signal the connection conductor carries. The package may have an interconnecting conductor extending to electrically connect the first and second reference potential conductors.

REFERENCES:
patent: 4922324 (1990-05-01), Sudo
patent: 4972253 (1990-11-01), Palino et al.
patent: 5043794 (1991-08-01), Tai et al.
High Density Packaging Technology Handbook, pp. 352-353, Science-forum Co., Ltd., Mar. 15, 1986.

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