Package for semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With textured surface

Reexamination Certificate

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Details

C257S633000, C257S686000, C257SE21512, C257SE23110

Reexamination Certificate

active

10855979

ABSTRACT:
To prevent the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a small strength. A package for semiconductor devices is formed as a laminate (20) of many layers including a plurality of conducting layers and insulating resin layers that are alternately laminated one upon other and having, on one surface of the laminate, a portion for mounting a semiconductor element. The whole regions or some regions of the insulating resin layers (20dto20f) of the laminate, including at least the portion for mounting the semiconductor element and the peripheries thereof, are constituted by a prepreg obtained by impregnating a woven fabric of a liquid crystal polymer with an insulating resin.

REFERENCES:
patent: 6350952 (2002-02-01), Gaku et al.
patent: 6418615 (2002-07-01), Rokugawa et al.
patent: 6525921 (2003-02-01), Nakatani et al.
patent: 6756663 (2004-06-01), Shiraishi et al.
patent: 2002/0001937 (2002-01-01), Kikuchi et al.
patent: 11-163208 (1999-06-01), None
patent: 2000-031642 (2000-01-01), None
patent: 2000-323613 (2000-11-01), None
patent: 2001-036253 (2001-02-01), None
patent: 2001-274556 (2001-10-01), None
patent: 2002-016173 (2002-01-01), None

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