Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-04-15
2002-04-30
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S121000, C438S122000, C438S124000, C438S690000
Reexamination Certificate
active
06379996
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a package for a semiconductor chip, and more particularly, to a package having a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer.
2. Description of the Related Art
A prior art package includes a heat spreader (metal plate) having a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer. The metal plate has a uniform thickness, and a recess having a predetermined depth is formed in the metal plate by a pressing process using metal molds (see Ashtok Domadia et al., TBGA Bond Process for Ground and Power Plane Connections”, IEEE 1996 Electronic Components and Technology Conference, pp. 707-712). This will be explained later in detail.
In the above-described prior art package, since the recess is formed in the metal plate by a pressing process, it is impossible to remarkably increase the thickness of the metal plate. Even in this case, the thickness of the metal plate is increased by a moderate value to increase the rigidity of the plane portion thereof. This is advantageous in terms of the handling of the package and forming solder balls. Simultaneously, the rigidity of the metal plate around the recess is increased. Therefore, strain generated in the metal plate around the semiconductor chip due to the heating thereof is hardly leaked through the metal plate around the recess thereof, so that large stress is applied to the back surface of the semiconductor chip. Thus, the semiconductor chip is easily peeled from the metal plate, which deteriorates the reliability of the package.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a package for a semiconductor chip capable of decreasing the manufacturing cost.
Another object is to improve the reliability of a package for a semiconductor chip.
According to the present invention, in a package for mounting including a metal plate having a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer, the recess portion is thinner than the plane portion.
Also, in a method for manufacturing a package including a metal plate including a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer, a photoresist pattern layer is formed to cover the plane portion of the metal plate, and the metal plate is etched by using the photoresist pattern layer as a mask.
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Ashtok Domadia et al., “TBGA Bond Process for Ground and Power, Plane Connections”, IEEE 1996 Electronic Component and Technology Conference, pp. 707-712.
Jones Josetta I.
McGinn & Gibb PLLC
NEC Corporation
Niebling John F.
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