Package for housing a semiconductor element

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Patent

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Details

257532, 257689, 257693, H01L 2900, H01L 2352, H01L 2348

Patent

active

058834281

ABSTRACT:
A semiconductor element-housing package, comprising an insulating substrate composed of a plurality of laminated insulating layers and having a mounting portion for mounting a semiconductor element, in the center of a top surface thereof; a ground bonding pad and a power-supply bonding pad formed on the top surface of the insulating substrate, at the periphery of the semiconductor element-mounting portion, to which a ground electrode and a power-supply electrode of the semiconductor element are connected; and a pair of capacitor-connecting pads, formed on the underside of the insulating substrate, one of which is connected to the ground bonding pad, the other of which is connected to the power-supply bonding pad, and to both of which electrodes of a chip capacitor are connected, characterized by having a ground plane and a power-supply plane sandwiching at least one of the insulating layers buried opposing each other within the insulating substrate, and having electrical connections from the ground plane and the power-supply plane to the ground bonding pad and the power-supply bonding pad, respectively, at the periphery of the semiconductor element-mounting portion of the insulating substrate, to thereby downsize the package and to produce a satisfactory, noise-reducing effect.

REFERENCES:
patent: 4835344 (1989-05-01), Iyogi et al.
patent: 5370907 (1994-12-01), Yamakawa et al.
patent: 5371403 (1994-12-01), Huang et al.
patent: 5394008 (1995-02-01), Ito et al.
patent: 5399902 (1995-03-01), Bickford et al.
patent: 5402318 (1995-03-01), Otsuka et al.
patent: 5468694 (1995-11-01), Taguchi et al.

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