Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
1995-12-06
2001-05-01
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S704000, C257S738000, C257S779000
Reexamination Certificate
active
06225700
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a package for a semiconductor element for the purpose of housing a semiconductor integrated circuit element such as an LSI device.
2. Description of the Related Art
A conventional package for housing a semiconductor integrated circuit element such as semiconductor elements in particular, an LSI device (large-scale integrated circuit element), usually comprises an insulating substrate which is composed of an electrically insulating material such as an alumina ceramic and has a semiconductor element-mounting portion for housing a semiconductor integrated circuit element nearly at a middle top surface thereof; a plurality of metallized wiring layers composed of powder of a high-melting point metal such as tungsten or molybdenum which lead out from the periphery of the semiconductor element-mounting portion of the insulating substrate to a lower surface thereof; a plurality of connection pads formed on the lower surface of the insulating substrate to which the metallized wiring layers are connected; ball-like terminals composed of solder (eutectic solder with a weight ratio of lead and tin of 4:6) soldered to the connection pads; and a lid. The package for housing a semiconductor element is fabricated as a product by securely bonding the semiconductor integrated circuit element to the bottom surface of the semiconductor element-mounting portion of the insulating substrate by means of an adhesive such as glass or resin while electrically connecting each electrode of the semiconductor integrated circuit element to the metallized wiring layer by means of a bonding wire, bonding the lid to the upper surface of the insulating substrate by means of a sealing material such as glass or resin, and then hermetically sealing the semiconductor integrated circuit element inside a container which comprises the insulating substrate and the lid.
This type of semiconductor device is mounted to an external electric circuit board by bringing the terminals composed of solder soldered to the connection pads on the lower surface of the insulating substrate into contact with a wire conductor of the external electric circuit board and then thermally fusing the terminals at a temperature of from about 200 to 250° C. to bond the terminals to the wire conductors. Simultaneously, each electrode of the semiconductor integrated circuit element housed inside the package for housing a semiconductor integrated circuit element is electrically connected to the external electronic circuit through the metallized wiring layer and the terminal.
However, in contrast to the fact that the thermal expansion coefficient of the insulating substrate composed of, for example, alumina ceramic is about 6.5×10
−5
/° C. in a conventional package for housing a semiconductor element, the external electric circuit board is usually composed of glass epoxy resin with a thermal expansion coefficient from 2×10
−5
/° C. to 4×10
−5
/° C. Because both thermal expansion coefficients differ greatly, when a semiconductor integrated circuit element is housed inside a package for housing a semiconductor element and then mounted to an external electric circuit board, heat generated while the semiconductor integrated circuit element is operating is repeatedly applied to both the insulating substrate and the external electric circuit board, a large thermal stress occurs between the insulating substrate of the package for housing a semiconductor element and the external electric circuit board due to the difference of both thermal expansion coefficients. This thermal stress acts on the external periphery of the connection pads of the lower surface of the insulating substrate, and makes the connection pads peel off from the insulating substrate. Because of that, such package has a drawback in that it is incapable of electrically connecting each electrode of the semiconductor integrated circuit element housed inside the package to a predetermined external electronic circuit for long periods of time.
Thereupon, to eliminate the above-mentioned drawback, the present inventors previously proposed a package for housing a semiconductor element in that terminals composed of eutectic solder are attached to the connection pads which had been attached to the bottom surface of depression portions provided on a lower surface of the insulating substrate to form protruding portions on the lower surface of the insulating substrate. According to this type of package for housing a semiconductor element, the thermal stress that occurs between the insulating substrate and the external electric circuit board due to the difference of both thermal expansion coefficients is reduced by being dispersed to terminals positioned at the external periphery of the connection pads and the opening of the depression portion of the insulating substrate, thereby resulting in effectively preventing the peeling of the connection pads from the insulating substrate.
However, in this package for housing a semiconductor element, since the terminals are formed of eutectic solder and all the terminals are simultaneously fused by heating and solidified, when the semiconductor device is mounted to the external electric circuit board by thermally fusing and then bonding the terminals to the wire conductors of the external electric circuit board, all the terminals are virtually and simultaneously fused, becoming a liquid state along with a part of the liquified solder positioned inside the depression portion of the insulating substrate being absorbed in the protruding portion of the lower surface of the insulating substrate by means of surface tension. This leads to a drawback that the area between the protruding portion of the terminals and the region inside the depression portion is divided up and it will become impossible to firmly, electrically connect each electrode of the semiconductor integrated circuit element to the external electronic circuit.
Furthermore, if the package for housing a semiconductor element is additionally large in shape and the total weight heavy, when the package for housing a semiconductor element is mounted to the external electric circuit board by thermally fusing the ball-like terminals soldered to the connection pads on the lower surface of the insulating substrate and bonding these ball-like terminals to the wire conductors of the external electric circuit board, the thermally fused ball-like terminals are crushed by the weight of the package for housing a semiconductor element and are spread between the lower surface of the insulating substrate and the external electric circuit board. This results in a drawback that it will become difficult to electrically connect each ball-like terminal to a predetermined external electronic circuit with reliability, while causing electrical short-circuits between adjacent ball-like terminals.
SUMMARY OF THE INVENTION
This invention, having been accomplished in consideration of the above-mentioned drawbacks, is aimed at providing a package for housing a semiconductor element that can securely and electrically connect each electrode of a semiconductor integrated circuit element housed inside the package to a predetermined external electronic circuit for long periods of time.
According to this invention, there is provided:
A package for housing a semiconductor element, the package comprising:
an insulating substrate comprising an electrically insulating material, the insulating substrate having a semiconductor element-mounting portion at an upper surface thereof onto which the semiconductor element is mounted as well as having a plurality of depression portions at a lower surface thereof;
a plurality of metallized wiring layers which lead out from the periphery of the semiconductor element-mounting portion and extend to the bottom surface of the depression portions;
a plurality of connection pads formed on the bottom surface of the depression portions of the insulating substrate, the plurality of connection pads bein
Ito Nobuyuki
Matsuda Shin
Chambliss Alonzo
Chaudhuri Olik
Hogan & Hartson LLP.
Kyocera Corporation
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