Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1999-10-27
2001-11-13
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S719000, C361S767000, C361S768000, C361S792000, C174S255000, C257S691000, C257S700000, C257S701000, C257S702000, C257S786000
Reexamination Certificate
active
06317333
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a package construction of semiconductor device, and more particularly to a package construction of semiconductor device having a BGA (Ball Grid Array) construction wherein solder balls used for soldering when mounting the semiconductor device are arranged on the rear surface of the substrate in the form of matrix.
In general, as disclosed in, for example, Japanese Unexamined Patent Publication No. 330474/1996, plastic packages, metal packages, and ceramic packages are used for packaging a semiconductor element. Among these packages, the ceramic package is used for packaging of CMOS gate arrays, ECL gate arrays, etc. because of its insulating and heat radiation capabilities as well as its moisture resistance.
For example, in Japanese Unexamined Patent Publication No. 8359/1996, there is disclosed BGA package which has been used as one type of surface mounting type package of plastic packages. The BGA package is manufactured by arranging solder bumps in the form of a matrix on the surface on the semiconductor chip side of the substrate on which the semiconductor chip is arranged, arranging spherical solder balls in the form of a matrix on the surface opposite to the semiconductor chip, arranging the semiconductor chip on the substrate surface, and sealing with resin or potting. In particular, the BGA package is used as a multi-pin package having more than 200 pins. Now, the construction in which solder balls serving as external electrodes are arranged in the form of a matrix on the rear surface of the substrate is called the BGA construction. Packaging the semiconductor device by this BGA construction is called BGA package, and the substrate with insulating layers laminated to form the BGA construction is called the BGA substrate.
In the case of this BGA package, organic material (or organic material containing non-organic material) hereinafter referred to as “organic material”, might be used for the substrate material, but when this BGA package semiconductor device is mounted on a substrate surface, the difference in thermal expansion among the semiconductor chip, BGA substrate, and substrate mounted with a semiconductor device (hereinafter called the “circuit board”) creates a problem.
The solder balls serving as external electrodes are provided on the surface opposite to the semiconductor chip of the BGA substrate and solder bumps are provided on the surface on the semiconductor chip side. The thermal expansion coefficient of the BGA substrate is greater on the outermost circumferential side, and stress generated by the thermal expansion is the greatest there. For this reason, there arises a problem that disconnection of solder bump for joining the semiconductor chip occurs or the semiconductor chip itself peels off.
If the BGA substrate is made of ceramic material, fine line design is possible with respect to interlayer connection lines by integral sintering, and signal lines in the substrate can be optionally designed. However, in the case of an organic material, there is employed a buildup manufacturing method in which an insulating layer must first be formed, signal lines are wired to this insulating layer, via holes for interlayer connections are formed in the insulating layer, the next layer is formed on this top layer, and the signal lines and via holes are provided. Therefore, there are many restrictions in line design, and the material of BGA construction and signal line capable of solving the thermal expansion problems have not yet been obtained.
An object of the present invention is to provide a semiconductor device of the BGA construction with a high reliability, free of solder bump disconnection and removal of a semiconductor chip even when thermal stress is generated by thermal expansion.
SUMMARY OF THE INVENTION
A semiconductor device according to the present invention comprises a BGA substrate composed of an upper insulating layer in which a plurality of insulating layers are laminated, an intermediate insulating layer, and a lower insulating layer in which a plurality of insulating layers are laminated;
a plurality of lines provided on each top surface of the insulating layers included in the upper insulating layer, the intermediate insulating layer, and the lower insulating layer, respectively;
a plurality of solder balls provided on the outermost surface of the lower insulating layer; and
a semiconductor chip having a plurality of electrodes to be connected to the plurality of lines respectively, the semiconductor chip being connected electrically with the plurality of solder balls through a plurality of via holes provided in each of the insulating layers,
wherein a material for the insulating layers comprises an organic material which fits thermal expansion characteristics of a circuit board on which the semiconductor device is mounted.
In a semiconductor device of this invention having the thermal expansion characteristics of the circuit board expressed by the coefficient of linear expansion, wherein the difference of linear thermal expansion coefficient between the intermediate layer of the BGA substrate and the circuit board is within 1×10
−5
/° C., and the difference of linear thermal expansion coefficients among the materials within the BGA substrate is within 1×10
−4
/° C.
A semiconductor device according to the invention contains at least one of the epoxy resin and tetrafluoroethylene resin for the organic material.
A semiconductor device of this invention comprises a BGA substrate composed of an upper insulating layer in which a plurality of insulating layers are laminated, an intermediate insulating layer, and a lower insulating layer in which a plurality of insulating layers are laminated;
a plurality of lines provided on top surfaces of the insulating layers included in the upper insulating layer, the intermediate insulating layer, and the lower insulating layer, respectively;
a plurality of solder balls provided on the outermost surface of the lower insulating layer; and
a semiconductor chip having a plurality of electrodes to be connected to the plurality of lines respectively, the semiconductor chip being connected electrically with the plurality of solder balls through a plurality of via holes provided in each of the insulating layers,
wherein the plurality of electrodes are provided in a peripheral region of the semiconductor chip, and the power supply and ground are connected to electrodes on outermost circumferential rows and innermost circumferential rows, respectively.
A semiconductor device according to this invention comprises a BGA substrate composed of an upper insulating layer in which a plurality of insulating layers are laminated, an intermediate insulating layer, and a lower insulating layer in which a plurality of insulating layers are laminated;
a plurality of lines provided on top surfaces of the insulating layers included in the upper insulating layer, the intermediate insulating layer, and the lower insulating layer respectively;
a plurality of solder balls provided on the outermost surface of the lower insulating layer; and
a semiconductor chip having a plurality of electrodes to be connected to the plurality of lines respectively,
wherein the semiconductor chip is connected electrically with the plurality of solder balls through a plurality of via holes provided in each of the insulating layers; the semiconductor device further including a sealing member comprising sealing resin to bring the semiconductor chip in close contact with the BGA substrate, a heat spreader for discharging heat generated in the semiconductor chips to the outside, a ring providing a specified clearance between the BGA substrate and the heat spreader as well as joining them, wherein a material for the insulating layers comprises organic material which fits to the thermal expansion characteristics of a circuit board on which the semiconductor device is mounted.
REFERENCES:
patent: 3871015 (1975-03-01), Lin et al.
patent: 4604644 (1986-08-01), Beckham et al.
paten
Gaffin Jeffrey
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Vigushin John B.
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