Active solid-state devices (e.g. – transistors – solid-state diode – With specified dopant – Deep level dopant
Reexamination Certificate
2005-08-10
2009-06-02
Smith, Matthew (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
With specified dopant
Deep level dopant
C257SE23137, C257SE21085
Reexamination Certificate
active
07541663
ABSTRACT:
This p-type silicon wafer was subjected to heat treatment to have a resistivity of 10 Ω·cm or more, a BMD density of 5×107defects/cm3or more, and an n-type impurity concentration of 1×1014atoms/cm3or less at a depth of within 5 μm from a surface of the wafer. This method for heat-treating p-type silicon wafers, the method includes the steps of: loading p-type silicon wafers onto a wafer boat, inserting into a vertical furnace, and holding in an argon gas ambient atmosphere at a temperature of 1100 to 1300° C. for one hour; moving the wafer boat to a transfer chamber and discharging the silicon wafers; and transferring to the wafer boat silicon wafers to be heat treated next, wherein after the discharge of the heat-treated silicon wafers, the silicon wafers to be heat-treated next are transferred to the wafer boat within a waiting time of less than two hours.
REFERENCES:
patent: 6544656 (2003-04-01), Abe et al.
patent: 2001/0037761 (2001-11-01), Ries et al.
patent: 2004/0009111 (2004-01-01), Haga et al.
patent: 2005/0250297 (2005-11-01), Shive et al.
patent: WO 0173838 (2001-10-01), None
Kusaba Tatsumi
Okuda Hidehiko
Jefferson Quovaunda
Pillsbury Winthrop Shaw & Pittman LLP
Smith Matthew
Sumco Corporation
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