Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2005-12-13
2005-12-13
Thompson, Craig A. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C438S309000
Reexamination Certificate
active
06974969
ABSTRACT:
A high performance bipolar transistor device is realized from a series of layers formed on a substrate, the series of layers including a first set of one or more layers each comprising n-type dopant material, a second set of layers forming a p-type modulation doped quantum well structure, and a third set of one or more layers each comprising n-type dopant material. The first set of layers includes an n-type ohmic contact layer. A collector terminal metal layer is deposited and patterned on one layer of the third set. P-type ion implant regions and a patterned base terminal metal layer (which contact the p-type modulation doped quantum well structure) are formed in an interdigitated manner with respect to a patterned emitter metal layer formed on the n-type ohmic contact layer. Preferably, a capping layer that covers the sidewalls of the active device structure (as well as covering the collector metal layer) is used to form the interdigitated base and emitter metal layers of the device. One or more of the metal layers of the device are preferably formed from a composite metal structure (such as a NiInW composite metal structure) that is transformed into a low resistance metal layer by a rapid-thermal anneal operation.
REFERENCES:
patent: 3919656 (1975-11-01), Sokal et al.
patent: 4424525 (1984-01-01), Mimura
patent: 4573064 (1986-02-01), McLevige et al.
patent: 4658403 (1987-04-01), Takiguchi et al.
patent: 4683484 (1987-07-01), Derkits, Jr.
patent: 4806997 (1989-02-01), Simmons et al.
patent: 4814774 (1989-03-01), Herczfeld
patent: 4827320 (1989-05-01), Morkoc et al.
patent: 4829272 (1989-05-01), Kameya
patent: 4899200 (1990-02-01), Shur et al.
patent: 4949350 (1990-08-01), Jewell et al.
patent: 5003366 (1991-03-01), Mishima et al.
patent: 5010374 (1991-04-01), Cooke et al.
patent: 5105248 (1992-04-01), Burke et al.
patent: 5202896 (1993-04-01), Taylor
patent: 5288659 (1994-02-01), Koch et al.
patent: 5337328 (1994-08-01), Lang et al.
patent: 5386128 (1995-01-01), Fossum et al.
patent: 5422501 (1995-06-01), Bayraktaroglu
patent: 5436759 (1995-07-01), Dijaili et al.
patent: 5452118 (1995-09-01), Maruska
patent: 5698900 (1997-12-01), Bozada et al.
patent: 5999553 (1999-12-01), Sun
patent: 6031243 (2000-02-01), Taylor
patent: 6037616 (2000-03-01), Amamiya
patent: 6043519 (2000-03-01), Shealy et al.
patent: 6239475 (2001-05-01), Johansson et al.
patent: 6479844 (2002-11-01), Taylor
patent: 6483170 (2002-11-01), Johansson
patent: 6720584 (2004-04-01), Hata et al.
patent: 2002/0067877 (2002-06-01), Braun et al.
10-Gb/s High-Speed Monolithically Integrated photoreceiver Using InGaAs p-i-n PD and Planar Doped InAlAs/InGaAs HEMT'sby Akahori et al, IEEE Photonics Technology Letters, vol. 4, No. 7, Jul. 1992.
10-Gbit/s InP-Based High-Performance Monolithic Photoreceivera Consisting of p-i-n Photodiodes and HEMT'sby Takahata et al., IEICE Trans. Electron., vol. E83-C, No. 6 Jun. 2000.
10-Ghz Bandwidth Monolithic p-i-n Modulation-doped Field Effect Transistor Photoreceiverby Dutta et al., Appl. Phys. Lett., vol. 63, No. 15, Oct. 11, 1993.
20 Gbit/s Long Wavelength Monolithic Integrated Photoreceiver Grown on GaAsby Hurm, et al., Electronics Letters, vol. 33, No. 7, Mar. 27, 1997.
Monolithic Integrated Optoelectronic Circuitsby Berroth et al., Fraunhofer Institute for Applied Solid State Physics (IAF), Germany, IEEE 1995.
Heterojunction Field-Effect Transistor(HFET), Reprinted from Electronics Letters, vol. 22, No. 15, pp. 784-786, Jul. 17, 1986.
High Temperature Annealing of Modulation Doped GaAs/A1GaAs Heterostructures for FET Applicationsby Lee et al., 1983 IEEE/Cornell Conf. On High-Speed Semiconductor Device & Ckts, Aug. 1983.
Submicrometre Gate Length Scaling of Inversion Channel Heterojunction Field Effect Transistorby Kiely et al., Electronics Letters, vol. 30, No. 6 Mar. 17, 1994.
Theoretical and Experimental Results for the Inversion Chennel Heterostructure Field Effect Transistorby Taylor et al., IEE Proceedings-G, vol. 140, No. 6, Dec. 1993.
Transmitting Transistor Design: RF Transmitting Transistor and power amplifier fundamentals, Phillips Semiconductors; Mar. 23, 1998.
Thermally Stable Ohmic Contacts to n-type GaAS. VIII. Sputter-deposited InAs Contacts: HJ Kim, Masanori Murakami, SL Wright, M. Norcott, WH Price and D. La Tulipe; Apr. 11, 1990.
Thermally Stable Ohmic Contact to n-type GaAs IX. Sputter-deposted InAs Contacts Niln(mn)and Niln(w)Contact Metals, J. Applied Physics, vol. 70, Nov. 12, 1991 pp. 7443-7448.
Transferred Substrate HBT's with 254 GH2F.D. Mensa et al.; Electron Lett. Apr. 1999; 35(7) pp. 605-606.
Gordon & Jacobson P.C.
Harrison Monica D.
The University of Connecticut
Thompson Craig A.
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