Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1997-12-23
2000-04-04
Picardat, Kevin M.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438106, 438121, H01L 2144, H01L 2148, H01L 2150
Patent
active
06046075&
ABSTRACT:
A semiconductor integrated circuit package is provided with insulated bonding wires. The semiconductor die is mounted to a base of either a leadframe or a grid-array package. A plurality of bonding wires are bonded between bonding pads on the semiconductor die and bonding fingers at inner ends of package conductors. The bonding wires have an oxygen-plasma oxide formed thereupon to thereby provide electrically-insulated bonding wires to prevent short-circuits between adjacent bonding wires. After wire bonding of the bonding wires, the bonding wires are subjected to an oxygen plasma to form an insulating oxide on the bonding wires to prevent short-circuits with adjacent wires. The wires are aluminum or copper with an oxygen-plasma oxide formed thereupon. An oxygen-plasma oxide is simultaneously formed on a leadframe and is removed from the outer ends of the leads by blasting with a medium.
REFERENCES:
patent: 5396104 (1995-03-01), Kimura
patent: 5639558 (1997-06-01), Tatsumi et al.
patent: 5843808 (1998-12-01), Karnezos
Collins D. M.
King Patrick T.
Picardat Kevin M.
VLSI Technology Inc.
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