Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
1999-09-02
2001-07-10
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S700000, C438S640000, C438S704000
Reexamination Certificate
active
06258729
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor fabrication methods. More particularly, the present invention pertains to oxide etching methods for use in profile improvement in the formation of structures, e.g., high aspect ratio structures.
BACKGROUND OF THE INVENTION
Various etching processes are used in the fabrication of semiconductor devices. Such etching processes are used to control and maintain critical dimensions of various device structures such as, for example, transistors, capacitors, and interconnects. As semiconductor devices become more integrated and miniaturized, the maintenance and control of such critical dimensions of device structures becomes more important.
During the formation of semiconductor devices, such as dynamic random access memories (DRAMs), static random access memories (SRAMs), microprocessors, etc., insulating layers such as silicon dioxide, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), TEOS, or other oxides, are etched to form insulating structures, e.g., openings, used for various purposes. Such purposes may include the formation of capacitor structures, contact structures, interconnect structures, etc.
For example, with respect to interconnect structures, it is often required that conductive layers be interconnected through openings or holes in an insulating layer. Such holes or openings are commonly referred to as contact openings when the hole extends through an insulating layer to an active device area or vias when the hole or opening extends through an insulating layer between two conductive layers.
Further, for example, in the formation of certain types of capacitors, openings in insulating layers may be formed such that a capacitor structure may be formed therein. One illustration of such a capacitor structure is described in U.S. Pat. No. 5,392,189 to Fazan, et al., entitled “Capacitor Compatible With High Dielectric Constant Materials Having Two Independent Insulating Layers And The Method For Forming Same,” issued Feb. 21, 1995. In this illustrative capacitor example, a storage cell capacitor is provided wherein electrodes are formed of a conductive material within high aspect ratio openings in an opening defined by a bottom surface and side walls in an insulating layer.
The profile of such structures is of particular importance, for example, such that desired characteristics are exhibited when further processing is carried out relative to the structure. For example, in many circumstances it is preferred to have openings or structures having near vertical profiles, e.g., at least one wall being near vertical. In other words, the slope of the walls defining the openings or structures have a slope that is very close to 90°.
For example, with respect to a contact hole or via, a near vertical wall defining the opening into which conductive material is formed provides a larger area at the bottom of the opening as opposed to an opening defined by walls that are less than vertical. Contact resistance for a contact formed in the opening is sensitive to the area at the bottom of the opening.
Further, for example, with respect to a capacitor structure such as a container capacitor illustratively described in U.S. Pat. No. 5,392,189 to Fazan et al., near vertical walls defining a container opening in which a capacitor structure is formed provides a significant increase in cell capacitance for a given height of a capacitor structure relative to a container opening defined by walls that are less than vertical. For example, an opening defined with near vertical walls extending from a bottom surface will generally provide a greater surface area upon which an electrode of a capacitor can be formed relative to a structure having sloped walls which are less than vertical, e.g., less than 88° slope.
The etching of a structure or opening in an insulating layer, e.g., oxide layer, resulting in walls that are generally near vertical is difficult. This is particularly true with respect to high aspect ratio openings. It is known to utilize dry etch plasmas containing fluorocarbons or hydrofluorocarbons to etch oxides, or other insulating layers, relative to underlying conductive layers, e.g., silicon-containing layers such as doped silicon, polysilicon, or other conductive materials. For example, plasmas containing CHF
3
, C
2
HF
5
, CH
2
F
2
and combinations thereof have been used to perform such an etch of insulating layers. Further, other gases may be mixed with the fluorocarbon or hydrofluorocarbon plasmas in the etch process to enhance the etch. For example, argon and helium are commonly used diluents typically used to dilute the chemical species and to stabilize the plasma when generated.
However, use of such conventional dry etch processing (e.g., plasmas containing fluorocarbons or hydrofluorocarbons) to etch openings generally result (at best) in walls which define the opening or structure having a slope of between 85° and about 88° relative to horizontal. Such a profile is, in many circumstances, undesirable when attempting to optimize the characteristics of the structure being formed, e.g., a capacitor, a contact, etc. Such a profile is particularly undesirable with respect to high aspect ratio structures.
SUMMARY OF THE INVENTION
To overcome the problems described above, and provide for profile improvement with respect to insulating structures, e.g., high aspect ratio structures, preferably, a novel insulating layer structure and a combination dry etch and wet etch process is used.
An etching method according to the present invention includes providing a first insulating material layer on a substrate assembly surface and a second insulating material layer on the first insulating material layer. The first insulating material layer has an etch rate that is greater than the etch rate of the second insulating material layer when exposed to an etch composition. Portions of the first insulating material layer and the second insulating material layer are removed using at least the etch composition.
In one embodiment of the method, the first insulating material layer has an etch rate about 1.5 times or more greater than the etch rate of the second insulating material layer when exposed to the etch composition.
In another embodiment of the method, removing portions of the first insulating material layer and the second insulating material layer includes patterning a mask layer over the first and second insulating layers and removing portions of the first and second insulating material layers exposed by the patterned mask layer using a plasma etch resulting in an initial opening therein. The initial opening is defined by at least one wall having a slope of less than about 88 degrees. The method further includes removing portions of the first and second insulating material layers using the wet etch composition to further extend the initial opening such that the slope of the at least one wall is in the range of about 88 degrees to 90 degrees.
In yet another embodiment of the method, the first and second insulating material layers are formed of dissimilar oxide materials, e.g., dissimilar doped silicate glass such as BPSG and PSG, PSG at different dopant levels, BPSG at different dopant levels, etc.
A method of forming an opening according to the present invention includes providing a first insulating material layer on a substrate assembly surface and providing a second insulating material layer on the first insulating material layer. The first insulating material layer has an etch rate that is about 1.5 times or more greater than the etch rate of the second insulating material layer when exposed to a wet etch composition. A mask layer is patterned over the first and second insulating layers. Portions of the first and second insulating material layers exposed by the mask layer are removed using a plasma resulting in an initial opening therein. The initial opening is defined by at least one wall having a slope relative to horizontal. Portions of the first and second insulating material layers exposed by the mask laye
DeBoer Scott J.
Gilton Terry L.
Roberts Ceredig
Micro)n Technology, Inc.
Mueting Raasch & Gebhardt, P.A.
Rocchegiani Renzo N.
Smith Matthew
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