Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-06-03
1999-01-26
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, 438435, 448DIG50, H01L 2176
Patent
active
058638270
ABSTRACT:
A shallow trench isolation (STJ) (10) is used to isolate two active regions (12) from each other. The advantage of STI (10) is that the upper corners (14) are rounded. Rounding of the upper corners (14) is accomplished using an oxide deglaze prior to sidewall oxidation of the trench which undercuts the pad oxide (20) from the pad nitride (22). The allows the sidewall oxidation process to form a thicker oxide at upper corners (14) which in turn, rounds the corners. Rounded corners (14) minimum the electric field strength induced by the geometry. As a result, the Vt lowering that occurs in prior art STI structures is minimized and off-state leakage due to the inherent parasitic transistor at the upper corner is reduced.
REFERENCES:
patent: 4563227 (1986-01-01), Sakai et al.
patent: 5258332 (1993-11-01), Horioka et al.
patent: 5578518 (1996-11-01), Koike et al.
patent: 5719085 (1998-02-01), Moon et al.
Brady III W. James
Dang Trung
Donaldson Richard L.
Garner Jacqueline J.
Texas Instruments Incorporated
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