Oxide anti-fuse structure utilizing high voltage transistors

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit

Reexamination Certificate

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Reexamination Certificate

active

06686791

ABSTRACT:

FIELD
The present invention is directed to fuse structures included within semiconductor devices. More particularly, the present invention is directed to an oxide anti-fuse structure utilizing high voltage transistors with high area density and low programming current requirement.
BACKGROUND
Most semiconductor integrated circuit (“IC”) devices now in use are generally fabricated in what is called CMOS (Complementary Metal Oxide Semiconductor) technology, which forms both PMOS and NMOS transistors in a silicon substrate. The objective of IC technology is to minimize transistor size and increase the density of core transistors in IC devices.
Examples of semiconductor IC devices include programmable read-only memory (PROM) devices, programmable logic arrays (PLA), and other types of memory arrays, such as dynamic random access memory (DRAM), static random access memory (SRAM), video random access memory (VRAM) and erasable programmable read-only memory (EPROM). These IC devices are typically designed with a number of redundant component elements that may be used to replace defective components in order to provide a fully functional circuit. These redundant components may be individual memory rows, memory columns or even individual memory cells in a particular row and column. In addition, one or more fuses may be used, in conjunction with other circuit elements, to control various circuit parameters (i.e. a digital value, a voltage, a current etc.). In general, a fuse operates in one of two states (programmed or un-programmed), namely a “closed” (i.e. low resistance) state, and an “open” (i.e. high resistance) state, in order to isolate the defective component and to selectively connect the redundant component in place of the defective component. In addition, such fuses may also be used to store process information of the IC devices (i.e., chip identification) for subsequent use to identify the IC devices.
A variety of fuses have been used in IC devices. For example, one fuse structure is formed by the so-called “Zener zap” method. Another example fuse structure is a metal link formed of tungsten. However, metal link fuses require large programming currents and are not viable for use with IC devices formed using newer process technologies.
A more recent fuse structure is the poly fuse (“polysilicon” or “poly resistor” fuse). One advantage of the poly fuse over the metal link fuse is the lesser amount of current required to open the fuse element during programming. However, poly fuses exhibit a pre-burned resistance of 30-100 ohms and a post-burned resistance ranging from a few hundreds to thousands ohms. In addition, poly fuses exhibit a low area density due to a large programming current needed to activate transistors and burn (or blow) the fuse elements after packaged in the IC devices.
Therefore, a need exists for a new fuse structure for implementation within IC devices formed using standard CMOS processes that has a higher area density and requires a much smaller programming current when compared to poly fuses.


REFERENCES:
patent: 5838189 (1998-11-01), Jeon
patent: 6163488 (2000-12-01), Tanizaki et al.

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