Oversampling analog-to-digital converter and method with...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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Reissue Patent

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RE041830

ABSTRACT:
A delta-sigma modulator includes a chopper-stabilized integrator, a quantizer having an input coupled to an output of the integrator, an input signal acquiring circuit controlled by a switched reference feedback circuit and having an output coupled to the input of the integrator, and a frequency-shaped pseudo-random chopper clock signal generator circuit including a pseudo-random sequence generator and producing a frequency-shaped pseudo-random clock signal. Resetting circuitry is coupled to reset inputs of the pseudo-random sequence generator to reset it in synchronization with the digital output of the chopper-stabilized delta-sigma modulator to prevent noise caused by wrap-around operation of the pseudorandom sequence generator. A logic circuit produces chopper clock signals in response to the frequency-shaped pseudo-random clock signal and applies them to various input switches and output switches of the integrator.

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“A 20-bit 25-khz Delta-Sigma A/D Converter Utilizing a Frequency-Shaped Chopper Stabilization Scheme,” IEEE Journal of Solid-State Circuits, vol. 36, No. 3, Mar. 2001, pp. 566-569 (Chris Binan Wang).
“A New Dithering Method for Sigma-Delta Modulators,” Analog Integrated Circuits and Signal Processing, vol. 10, 1996, pp. 193-204 (Paul C. De Jong, Gerard C.M. Meijer and Arthur H. M. Van Roermund).

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