Oversampling analog-to-digital converter and method with...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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Reexamination Certificate

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11435597

ABSTRACT:
A delta-sigma modulator includes a chopper-stabilized integrator, a quantizer having an input coupled to an output of the integrator, an input signal acquiring circuit controlled by a switched reference feedback circuit and having an output coupled to the input of the integrator, and a frequency-shaped pseudo-random chopper clock signal generator circuit including a pseudo-random sequence generator and producing a frequency-shaped pseudo-random clock signal. Resetting circuitry is coupled to reset inputs of the pseudorandom sequence generator to reset it in synchronization with the digital output of the chopper-stabilized delta-sigma modulator to prevent noise caused by wrap-around operation of the pseudorandom sequence generator. A logic circuit produces chopper clock signals in response to the frequency-shaped pseudo-random clock signal and applies them to various input switches and output switches of the integrator.

REFERENCES:
patent: 5034906 (1991-07-01), Chang et al.
patent: 5383143 (1995-01-01), Crouch et al.
patent: 6201835 (2001-03-01), Wang
patent: 6411242 (2002-06-01), Oprescu et al.
patent: 2005/0105591 (2005-05-01), Egan

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