Oversampled logic analyzer

Details Oversampled logic analyzer Oversampled logic analyzer

1994-02-16

1996-06-11

Voeltz, Emanuel T.

Boots, shoes, and leggings

364486, G01R 313177

Patent

active

055262864

ABSTRACT:
A logic analyzer acquires all data and clock signal inputs asynchronously at high speed using a digital FISO (10) to produce a plurality of parallel high-speed data samples within each cycle of an internal system clock (95). The plurality of parallel high-speed data samples describe the sequential behavior of one of the input signals during one period of the internal system clock. One of the plurality of parallel high-speed data samples is then selected to be the single data sample that is stored in the acquisition memory (80) for that clock cycle. The selection process includes a skew adjustment (20), clock edge detection and selection (50), aligning the sample associated with the detected and selected clock edge to a reference location (60), and selecting (70) as the single sample to be stored a sample having a relationship to the reference location that is determined by setup and hold adjustment data. The transitions detected are enabled (102) and ORed (108) to produce a setup and hold violation signal only if they are within the interval established by a set of setup and hold window mask signals.

REFERENCES:
patent: 4107651 (1978-08-01), Martin
patent: 4271488 (1981-06-01), Saxe
patent: 4353032 (1982-10-01), Taylor
patent: 4425643 (1984-01-01), Chapman et al.
patent: 4481647 (1984-11-01), Gombert et al.
patent: 4495621 (1985-01-01), Nakagomi et al.
patent: 4558422 (1985-12-01), DenBeste et al.
patent: 4578666 (1986-03-01), Anderson
patent: 4646297 (1987-02-01), Palmquist et al.
patent: 4731768 (1988-03-01), Easterday
patent: 4777616 (1988-10-01), Moore et al.
patent: 4903240 (1990-02-01), Von Flue
patent: 4949361 (1990-08-01), Jackson
patent: 4968902 (1990-11-01), Jackson
patent: 4979177 (1990-12-01), Jackson
patent: 5043927 (1991-08-01), Jackson
patent: 5144525 (1992-09-01), Saxe et al.
"Oversampling Pushes Logic-Analyzer Resolution to New Highs", Jennie Grosslight, pp. 99-108, Electronic Design, Jun. 24, 1993.
"4-GSa/s Timing and 1-GSa/s Synchronous State for the HP 16500A/B Logic Analysis System", Hewlett-Packard Marketing Material.
The HP 16517/18A Supplemental Specifications and Characteristics, Hewlett-Packard Specification Sheet.

Affiliated with

Also associated with

Rating

Oversampled logic analyzer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Oversampled logic analyzer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Oversampled logic analyzer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-358649