Oversampled A/D converter having digital error correction

Details Oversampled A/D converter having digital error correction Oversampled A/D converter having digital error correction

1988-02-24

1989-06-27

Shoop, Jr., William M.

Coded data generation or conversion

Analog to or from digital conversion

Nonlinear

341118, 341120, 341161, H03M 118

Patent

active

048433900

ABSTRACT:
An oversampled A/D converter which utilizes digital error correction is provided. In one form, the present invention is used with a sigma delta modulator having a plurality of rank ordered quantization loops, Each quantization loop contains an analog integrator circuit of predetermined gain which is subject to variation, thereby introducing errors. When the product of a reciprocal of the analog integrator gain and the gain of a digital gain stage of a subsequent quantization loop equals one, minimum noise exists in the data conversion. A digital gain control circuit is coupled to the digital gain stage for adjusting the gain of the digital gain stage during a calibration mode to provide minimum noise in the converter, thereby compensating for errors attributable to the analog integrator circuit.

REFERENCES:
patent: 4071842 (1978-01-01), Tewksbury
patent: 4584558 (1986-04-01), Maschek et al.
patent: 4704600 (1987-11-01), Uchimura et al.
Lawrence Rabiner and Bernard Gold, "Theory and Application of Digital Signal Processing", 1975, Chapters 6 and 10.

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