Overmolded semiconductor device having solder ball and edge lead

Details Overmolded semiconductor device having solder ball and edge lead Overmolded semiconductor device having solder ball and edge lead

1992-07-02

1993-08-24

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257779, 257787, 257691, H01L 2312, H01L 2314, H01L 2348

Patent

active

052391981

ABSTRACT:
A low cost manufacturing method is used to fabricate a small multiple chip semiconductor device (10). In one embodiment, a first pattern of conductive traces (14) is formed on one surface of a substrate (12), and a second pattern of traces (16) is formed on a second surface of the substrate (12). A first semiconductor die (20) is interconnected to the first traces (14), and a package body (24) is formed around the first die and a portion of the traces. A second semiconductor die (26) is interconnected to the second traces (16) on the second surface. A second package body (28) is formed around the second die and a portion of the traces (16). Solder balls (32) are coupled to exposed portions of the second traces (16) around the perimeter of the package body (28) to establish external power and ground connections to each die. Edge leads (36) are externally soldered to the traces (14 & 16) around the periphery of the substrate (12) to establish remaining electrical connections.

REFERENCES:
patent: 4264917 (1981-04-01), Ugon
patent: 4647126 (1987-03-01), Sabota, Jr.
patent: 4807021 (1989-02-01), Okumura
patent: 4922378 (1990-05-01), Malhi et al.
patent: 4967262 (1990-10-01), Farnsworth
patent: 4975763 (1990-12-01), Baudouin et al.
patent: 5018005 (1991-05-01), Lin et al.
patent: 5095359 (1992-03-01), Tanaka et al.
"Clipped Decoupled Twin-Carrier Module for IC Memory Chips"-IBM Technical Disclosure Bulletin-Hinrichsmeyer et al vol. 27, No. 8, Jan. 1985.

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