Overlay measuring mark and its method

Details Overlay measuring mark and its method Overlay measuring mark and its method

1999-08-03

2000-07-04

Bowers, Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Having substrate registration feature

438800, 257797, H01L 2176

Patent

active

060838078

ABSTRACT:
This invention discloses an overlay measuring mark and a method of measuring an overlay error of semiconductor used by the overlay measuring mark. This overlay measuring mark comprises a first mark formed on a first layer on a semiconductor substrate and including four bar sets, which form a first square pattern, each of said bar sets at least comprising two parallel bars relatively formed by a first slim pattern; and a second mark formed on a second layer on said first layer and including four bar formed a second square pattern, wherein said four bar relatively are formed by a second slim pattern and said second square is located in and smaller than said first square in a top view.

REFERENCES:
patent: 4595295 (1986-06-01), Wilczynski

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