Overlay mark, method of checking local aligmnent using the...

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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Details

C257S048000, C257SE23179, C438S014000, C382S151000, C356S615000, C356S620000

Reexamination Certificate

active

08084872

ABSTRACT:
An overlay mark is described, including N sets of parallel x-directional linear patterns respectively defined by N (≧2) exposure steps and N sets of parallel y-directional linear patterns respectively defined by the N exposure steps, and a set of parallel x-directional photoresist bars and a set of parallel y-directional photoresist bars both formed in a lithography process. The N sets of x-directional linear patterns and the set of x-directional photoresist bars are arranged in parallel. The N sets of y-directional linear patterns and the set of y-directional photoresist bars are arranged in parallel.

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