Overerase protection of memory cells for nonvolatile memory

Details Overerase protection of memory cells for nonvolatile memory Overerase protection of memory cells for nonvolatile memory

2006-04-25

2006-04-25

Yoha, Connie C. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185300, C365S185260, C365S185220

Reexamination Certificate

active

07035147

ABSTRACT:
The invention provides a nonvolatile memory and corresponding method having an optimal memory erase function and, more particularly, a method for erasing a nonvolatile memory comprising a source, a gate, a drain, a channel and a trapping layer. The method according to a preferred embodiment of the invention generally comprises the steps of applying a non-zero gate voltage to the gate, applying a non-zero source voltage to the source, applying a non-zero drain voltage to the drain in each erase shot wherein the drain voltage is generally higher in magnitude than the source voltage, generating hot holes in the nonvolatile memory, injecting the generated hot holes in the trapping layer near drain junction, and accordingly erasing the nonvolatile memory. The erase method according to a further embodiment of the invention comprises a verifying step after each erase shot for verifying the memory erase for the nonvolatile memory, and repeating the process steps according to the invention if the memory erase is not verified.

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patent: WO 00/58969 (2000-10-01), None

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