Overcurrent protection for an ink-jet printhead

Details Overcurrent protection for an ink-jet printhead Overcurrent protection for an ink-jet printhead

1996-06-24

1998-01-20

Gaffin, Jeffrey A.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 87, 361101, H02H 900

Patent

active

057106894

ABSTRACT:
A protection circuit prevents snapback events in MOS transistors associated with semiconductor or micromechanical structures, such as ink-jet ejectors. A bulk electrode associated with the MOS transistor is monitored for unusual high voltages which are consistent with an impending snapback event. The voltage on the bulk electrode is then used to turn on the control transistor which connects the gate of the MOS transistor to ground and thereby protects the device.

REFERENCES:
patent: 5229635 (1993-07-01), Bessolo et al.
patent: 5319515 (1994-06-01), Pryor et al.
patent: 5424892 (1995-06-01), Topp et al.
patent: 5444590 (1995-08-01), LeComte et al.
patent: 5455732 (1995-10-01), Davis
patent: 5576557 (1996-11-01), Ker et al.

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