Overcoming flicker in field-interlaced CCD imagers with three-ph

Details Overcoming flicker in field-interlaced CCD imagers with three-ph Overcoming flicker in field-interlaced CCD imagers with three-ph

1982-09-30

1984-11-06

Rubinson, Gene Z.

Facsimile and static presentation processing

Facsimile

Recording apparatus

358241, 358212, 357 24, H01I 1114

Patent

active

044815387

ABSTRACT:
Field-rate flicker is suppressed in a CCD imager having a three-phase operated image register provided interlacing by integrating odd-numbered fields with only the first clock phase high and even-numbered fields with only the second and third clock phases high. The flicker is suppressed by making the gate electrodes in the A register receiving the second and third clock phases of equal lengths, half that of the gate electrodes receiving the first clock phase.

REFERENCES:
patent: 3801884 (1974-04-01), Sequin
patent: 4231149 (1980-11-01), Chapman et al.
patent: 4236168 (1980-11-01), Herbst
patent: 4394675 (1983-07-01), Anagnostopoulos et al.
"Interlacing in Charge Coupled Imaging Devices", Carlo H. Sequin, IEEE Transactions on Electron Devices, vol. ED-20, No. 6, Jun. 1973, pp. 535-541.

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