Overclocking with phase selection

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S147000

Reexamination Certificate

active

08085070

ABSTRACT:
A novel solution that combines the technologies of fractional divider and phase selection is provided to implement over-clocking for CPU PLL in PC clock generator with a set resolution that is independent of the clock frequency.

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patent: 2002/0101955 (2002-08-01), Poullet
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patent: 2006/0164132 (2006-07-01), Martin et al.
patent: 2007/0247233 (2007-10-01), Keaveney
patent: 2009/0160509 (2009-06-01), Wu et al.
patent: 2010/0213984 (2010-08-01), Shin et al.

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