Horology: time measuring systems or devices – Power supply details – Electrical
Reexamination Certificate
2000-02-23
2002-04-16
Gutierrez, Diego (Department: 2859)
Horology: time measuring systems or devices
Power supply details
Electrical
C320S134000, C320S162000, C363S053000, C327S494000
Reexamination Certificate
active
06373790
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an overcharge prevention method and a charging circuit, suitable for preventing overcharge, and an electronic device and a timepiece, employing the overcharge prevention method and the charging circuit. This invention relates generally to a
BACKGROUND ART
In a charging circuit for charging a voltage storage device, such as a high-capacitance capacitor or a secondary battery, with an AC voltage generated by a generator, a diode-bridge circuit is typically employed as a rectifier circuit for full-wave rectifying the AC voltage. However, the diode-bridge circuit suffers from a loss due to a voltage drop through two diodes.
A compact and portable electronic device, such as a wristwatch, which employs a generator generating a small-amplitude AC voltage, is affected much by the loss through the diode-bridge circuit, and using the diode-bridge circuit as a rectifier circuit is not appropriate.
In view of the above problem, a synchronous rectifier circuit using transistors, rather than a diode, has been proposed.
FIG. 23
is a circuit diagram showing one example of a charging circuit employing a conventional synchronous rectifier circuit.
As shown in
FIG. 23
, the charging circuit includes comparators CMP
1
A and CMP
1
B, comparators CMP
2
A and CMP
2
B, P-channel FETs MP
1
and MP
2
, N-channel FETs MN
1
and MN
2
, and a high-capacitance capacitor C (charged device) for storing a charging current.
The comparator CMP
1
A compares an output voltage V
1
at an input terminal AG
1
connected to a generator AG with a source voltage Vdd. The comparator CMP
1
B compares an output voltage V
2
at an input terminal AG
2
connected to the generator AG with the source voltage Vdd.
The comparator CMP
2
A compares the output voltage V
1
at the input terminal AG
1
with a source voltage Vss. The comparator COM
2
B compares the output voltage V
2
at the input terminal AG
2
with the source voltage Vss.
The P-channel FET MP
1
is turned on and off under the control of the comparator CMP
1
A, and the P-channel FET MP
2
is turned on and off under the control of the comparator CMP
1
B.
The N-channel FET MN
1
is turned on and off under the control of the comparator CMP
2
A, and the N-channel FET MN
2
is turned on and off under the control of the comparator CMP
2
B.
D
1
-D
4
are MOSFET parasitic diodes.
FIG. 24
is a timing diagram illustrating the operation of the above-referenced charging circuit.
The generator AG respectively outputs, at the input terminals AG
1
and AG
2
, the output voltages V
1
and V
2
between which a phase difference of 180° occurs. The P-channel FET MP
1
is turned on by the comparator COM
1
A when the output voltage V
1
of the generator AG becomes equal to or higher than the source voltage Vdd.
The N-channel FET MN
2
is turned on by the comparator COM
2
B when the output voltage V
2
of the generator AG becomes equal to or lower than the source voltage Vss. Similarly, the P-channel FET MP
2
is turned on by the comparator COM
1
B when the output voltage V
2
of the generator AG becomes equal to or higher than the source voltage Vdd, and the N-channel FET MN
1
is turned on by the comparator COM
2
A when the output voltage V
1
of the generator AG becomes equal to or lower than the source voltage Vss.
A charging current i flows from the generator AG through arrow-headed paths into the high-capacitance capacitor C, charging the high-capacitance capacitor C, when both the P-channel FET MP
1
and the N-channel FET MN
2
are on, and when both the P-channel FET MP
2
and the N-channel FET MN
1
are on. In this way, the synchronous rectifier circuit employing the transistors performs full-wave rectification.
In such a charging circuit, when the charging voltage for the high-capacitance capacitor C exceeds a predetermined voltage, an overcharge state occurs, degrading the charging circuit and dropping its charging efficiency.
The present invention has been developed in view of the above problem, and it is an object of the present invention to provide an overcharge prevention method, a charging circuit, an electronic device and a timepiece, for preventing overcharge and for preventing a shortcircuit of a voltage storage element associated with an overcharge prevention step.
DISCLOSURE OF THE INVENTION
According to a first aspect of the present invention, in an overcharge prevention method for a voltage storage element connected to a bridge rectifier circuit including a first switching section connected between one input terminal supplied with an AC voltage and a first power source line, a second switching section connected between the other input terminal supplied with the AC voltage and the first power source line, a third switching section connected between the one input terminal and a second power source line, and a fourth switching section connected between the other input terminal and the second power source line, both the first and second switching sections or both the third and fourth switching sections are concurrently turned on, forming a closed loop path between the one input terminal and the other input terminal.
In the present invention, the first and second switching sections are P-channel MOSFETs while the third and fourth switching sections are N-channel MOSFETs.
In the present invention, an overcharge prevention method is used in a charging circuit which rectifies an AC voltage supplied to input terminals to charge a voltage storage element with power, wherein the charging circuit includes a first comparator section for comparing a terminal voltage at one input terminal supplied with the AC voltage with an output voltage at a first power source line, a first switching section, which is connected between the first power source line and the one input terminal, and is turned on and off under the control of the first comparator section, a second comparator section for comparing a terminal voltage at the other terminal with the output voltage at the first power source line, a second switching section, which is connected between the first power source line and the other input terminal, and is turned on and off under the control of the second comparator section, a third comparator section for comparing the terminal voltage supplied to the one terminal with an output voltage at a second power source line, a third switching section, which is connected between the second power source line and the one input terminal, and is turned on and off under the control of the third comparator section, a fourth comparator section for comparing the terminal voltage supplied to the other input terminal with the output voltage at the second power source line, a fourth switching section, which is connected between the second power source line and the other input terminal, and is turned on and off under the control of the fourth comparator section, and the voltage storage element connected between the first power source line and the second power source line. The overcharge prevention method includes a detecting step for detecting the voltage charged at the voltage storage element, a determining step for determining whether the detected charge voltage exceeds a predetermined voltage, a turning step for turning off the first and second switching sections or the third and fourth switching sections, when the charge voltage exceeds the predetermined voltage, and a forming step for forming a closed loop path between the one input terminal and the other input terminal, by concurrently turning on the first and second switching sections or the third and fourth switching sections.
In the present invention, the determining step for determining whether the detected charge voltage exceeds the predetermined voltage includes a comparing step for comparing the charge voltage with a reference voltage, with the predetermined voltage being the reference voltage.
In the present invention, in the forming step for forming the closed loop path, both the first and second switching sections are turned on.
In the present invention, in the forming step for forming
Goodwin Jeanne-Marguerite
Gutierrez Diego
Seiko Epson Corporation
Watson Mark P.
LandOfFree
Overcharge prevention method, changing circuit, electronic... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Overcharge prevention method, changing circuit, electronic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Overcharge prevention method, changing circuit, electronic... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2927186