Over-voltage tolerant, active pull-up clamp circuit for a...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C327S318000, C327S321000

Reexamination Certificate

active

06414533

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to bus switches, and more particularly to CMOS bus switches.
BACKGROUND OF THE INVENTION
The digital electronics industry is migrating to lower operating voltages, but systems are performing at increasing speeds. High-speed bus switches are needed in these systems to keep the data moving fast. However, systems running at higher frequencies generate more noise and this could lead to corruption of data if not properly handled.
There is desired an improved high-speed bus switch that provides undershoot protection for the bus switch to ensure that the buses remain isolated when the switch is disabled. This would eliminate the need for special undershoot protection circuitry in the system design which results in a less expensive system.
A basic CMOS crossbar switch is shown in
FIG. 1
as circuit
10
. This circuit
10
is typical of the input/output configuration of a bus switch, which is an N-channel pass transistor MN
1
with its source and drain connected to two different buses A and B. The gate of the pass transistor MN
1
is controlled by an output enable (OE) signal generated from an output of an enable circuit. Thus, the switch MN
1
will be closed when the gate voltage of transistor MN
1
is high, and the switch MN
1
will be open when the gate voltage of transistor MN
1
is low. Also included in
FIG. 1
are two Schottky diodes, D
1
and D
2
, that are used for undershoot protection. In the enabled state (gate voltage of transistor MN
1
is high), the undershoot voltage is not a problem. However, in the disabled state (gate voltage of transistor MN
1
is low), a negative voltage on a bus could cause the N-channel pass transistor MN
1
to turn on. This occurs when the negative bus voltage is larger in magnitude than the Vtn of transistor MN
1
. When one of the buses has a negative voltage that exceeds the forward turn-on voltage of the Schottky diode, then the diode will turn on and clamp the source or drain voltage of transistor MN
1
in order to keep the buses isolated.
One major problem with this implementation is the fact that Schottky diodes are slow to react to undershoot voltages with fast edge rates. This could cause the N-channel pass transistor to turn on and allow a large amount of current to affect the isolated bus. The amount of current flowing from one bus to another will be significant because of an additional parasitic NPN transistor that is formed across transistor MN
1
. Since the base of the parasitic NPN is tied to the substrate and is at ground, the negative undershoot voltage will turn on the NPN transistor if not clamped below the threshold voltage. In addition, the large capacitance of the Schottky diodes needed for clamping an undershoot makes this alternative very undesirable in bus switch applications.
Another implementation to protect bus switches against undershoot voltages is that of a charge pump. A charge pump with a negative voltage output could be used to control the gate of the pass transistor and the substrate bias. This could keep both the N-channel pass transistor MN
1
and the parasitic NPN off and keep the buses isolated. The problem with the charge pump solution is that the power supply current (Icc) is much higher, and the silicon area required on a die is greater due to the charge pump cells and the oscillator. Since bus switches are often found in systems where power consumption is critical, using a charge pump for undershoot voltage protection is not an effective solution.
SUMMARY OF THE INVENTION
A CMOS bus switch with undershoot protection to help prevent the corruption of data when the switch is open and the buses are isolated. The present invention includes an active pull-up clamp circuit one coupled to each bus. The clamp circuit does not use a charge-pump or Schottky diodes, and occupies reduced silicon wafer space.


REFERENCES:
patent: 4386284 (1983-05-01), Wacyk et al.
patent: 4890012 (1989-12-01), Stockinger
patent: 4975603 (1990-12-01), Wise et al.
patent: 5455523 (1995-10-01), Wallace et al.
patent: 5495198 (1996-02-01), Chen
patent: 5534811 (1996-07-01), Gist et al.
patent: 6052019 (2000-04-01), Kwong
patent: 6069515 (2000-05-01), Singh

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