Over erase correction method of flash memory apparatus

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185290

Reexamination Certificate

active

08081520

ABSTRACT:
An over erase correction method of a flash memory apparatus is provided. The flash memory apparatus includes at least a microprocessor, a memory array, a bit line exchange unit and a column decoder. By controlling the column decoder of the flash memory during a period of the over-erase correction, the column decoder outputs control signals to the bit line exchange unit for selecting at least one of the bit lines according to a magnitude of the bit line leakage current. The drop in the charge pump voltage due to the bit line leakage current is reduced, and thus, the over-erase correction is executed effectively during the period of the over-erase correction.

REFERENCES:
patent: 5844847 (1998-12-01), Kobatake
patent: 6046932 (2000-04-01), Bill et al.
patent: 6903980 (2005-06-01), Miki et al.
patent: 7599228 (2009-10-01), Lu et al.

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